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Merge branch 'fix/esp32s2_aes_dma_psram_partial_block_hang_v5.5' into 'release/v5.5'
Avoid ESP32-S2 Crypto DMA stall on PSRAM output with partial blocks (v5.5) See merge request espressif/esp-idf!51876
This commit is contained in:
@@ -62,8 +62,8 @@ static inline void crypto_dma_ll_reset_register(void)
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*/
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*/
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static inline void crypto_dma_ll_reset(void)
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static inline void crypto_dma_ll_reset(void)
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{
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{
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SET_PERI_REG_MASK(CRYPTO_DMA_CONF0_REG, CONF0_REG_AHBM_RST | CONF0_REG_OUT_RST | CONF0_REG_AHBM_FIFO_RST);
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SET_PERI_REG_MASK(CRYPTO_DMA_CONF0_REG, CONF0_REG_AHBM_RST | CONF0_REG_IN_RST | CONF0_REG_OUT_RST | CONF0_REG_AHBM_FIFO_RST);
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CLEAR_PERI_REG_MASK(CRYPTO_DMA_CONF0_REG, CONF0_REG_AHBM_RST | CONF0_REG_OUT_RST | CONF0_REG_AHBM_FIFO_RST);
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CLEAR_PERI_REG_MASK(CRYPTO_DMA_CONF0_REG, CONF0_REG_AHBM_RST | CONF0_REG_IN_RST | CONF0_REG_OUT_RST | CONF0_REG_AHBM_FIFO_RST);
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}
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}
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/**
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/**
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@@ -1053,6 +1053,26 @@ int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input, unsign
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return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH;
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return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH;
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}
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}
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#if SOC_AES_CRYPTO_DMA && CONFIG_SPIRAM
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/* The Crypto DMA in-channel stalls indefinitely (no descriptor error is raised) when a
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receive descriptor list transitions from a buffer in external RAM to one in internal
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RAM. Avoid linking the internal stream buffer descriptor after external-RAM data
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descriptors by processing the block-aligned part and the trailing partial block as
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two separate DMA operations. */
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if (block_bytes > 0 && stream_bytes > 0 && esp_ptr_external_ram(output)) {
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ret = esp_aes_process_dma(ctx, input, output, block_bytes, NULL);
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if (ret != 0) {
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mbedtls_platform_zeroize(output, len);
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return ret;
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}
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ret = esp_aes_process_dma(ctx, input + block_bytes, output + block_bytes, stream_bytes, stream_out);
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if (ret != 0) {
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mbedtls_platform_zeroize(output, len);
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}
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return ret;
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}
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#endif /* SOC_AES_CRYPTO_DMA && CONFIG_SPIRAM */
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if (block_bytes > 0) {
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if (block_bytes > 0) {
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/* Flush cache if input in external ram */
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/* Flush cache if input in external ram */
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#if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE)
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#if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE)
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@@ -664,7 +664,11 @@ void aes_psram_one_buf_ctr_test(void)
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uint8_t nonce[16];
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uint8_t nonce[16];
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uint8_t key[16];
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uint8_t key[16];
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uint8_t stream_block[16];
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uint8_t stream_block[16];
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#if CONFIG_MBEDTLS_HARDWARE_AES
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size_t SZ = TEST_AES_CTR_DATA_LEN;
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size_t SZ = TEST_AES_CTR_DATA_LEN;
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#else
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size_t SZ = TEST_AES_CTR_DATA_LEN - (TEST_AES_CTR_DATA_LEN % 16);
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#endif
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size_t ALIGNMENT_SIZE_BYTES = 32;
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size_t ALIGNMENT_SIZE_BYTES = 32;
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memset(nonce, 0x2F, 16);
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memset(nonce, 0x2F, 16);
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memset(key, 0x1E, 16);
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memset(key, 0x1E, 16);
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@@ -8,11 +8,15 @@
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#include <stdint.h>
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#include <stdint.h>
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#define TEST_AES_CTR_DATA_LEN (32 * 200)
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#define TEST_AES_CTR_DATA_LEN (32 * 200 + 33)
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/* Full reference ciphertext for AES-128-CTR with key=0x1E*16, IV=0x2F*16,
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/* Full reference ciphertext for AES-128-CTR with key=0x1E*16, IV=0x2F*16,
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* plaintext=0x26*6400. Used to validate the entire ciphertext (not just the
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* plaintext=0x26*6433. The length is deliberately not a multiple of the AES
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* tail) in aes_ctr_alignment_test and aes_psram_one_buf_ctr_test. */
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* block size so that the trailing partial block handling is exercised, and
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* the block-aligned part (6432 bytes) is a multiple of the PSRAM cache line
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* size so that the direct external-RAM DMA path is taken. Used to validate
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* the entire ciphertext in aes_ctr_alignment_test and
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* aes_psram_one_buf_ctr_test. */
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static const uint8_t expected_cipher_ctr[] = {
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static const uint8_t expected_cipher_ctr[] = {
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0xe8, 0x1d, 0x27, 0x57, 0x8d, 0x46, 0xd7, 0x62,
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0xe8, 0x1d, 0x27, 0x57, 0x8d, 0x46, 0xd7, 0x62,
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0xf7, 0x13, 0x77, 0x35, 0x6b, 0x73, 0xe6, 0x95,
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0xf7, 0x13, 0x77, 0x35, 0x6b, 0x73, 0xe6, 0x95,
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@@ -814,6 +818,11 @@ static const uint8_t expected_cipher_ctr[] = {
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0xcf, 0x8a, 0x8d, 0x73, 0x8c, 0x6b, 0xfa, 0x4d,
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0xcf, 0x8a, 0x8d, 0x73, 0x8c, 0x6b, 0xfa, 0x4d,
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0xd6, 0xc4, 0x18, 0x49, 0xdd, 0xc6, 0xbf, 0xc2,
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0xd6, 0xc4, 0x18, 0x49, 0xdd, 0xc6, 0xbf, 0xc2,
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0xb9, 0xf0, 0x09, 0x69, 0x45, 0x42, 0xc6, 0x05,
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0xb9, 0xf0, 0x09, 0x69, 0x45, 0x42, 0xc6, 0x05,
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0x5f, 0x42, 0xf6, 0x3b, 0x8e, 0x11, 0x43, 0xc8,
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0xc7, 0xd9, 0x85, 0xf3, 0xdc, 0x39, 0x6b, 0x33,
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0x98, 0x8c, 0xc0, 0xf5, 0x92, 0xb4, 0x04, 0xf9,
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0x2f, 0xdf, 0x12, 0xc0, 0xa1, 0xd2, 0xdc, 0x71,
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0x88,
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};
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};
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static const uint8_t long_input[] = {
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static const uint8_t long_input[] = {
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