mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
Merge branch 'feature/support_pvt_auto_dbias_c5_c61_p4_c6' into 'release/v6.0'
feat(pvt): support pvt auto dbiast on c5/c61/c6/p4 (from eco5)_v6.0 See merge request espressif/esp-idf!45385
This commit is contained in:
@@ -195,6 +195,10 @@ config SOC_PMU_SUPPORTED
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bool
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default y
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config SOC_PMU_PVT_SUPPORTED
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bool
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default y
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config SOC_PAU_SUPPORTED
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bool
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default y
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@@ -71,6 +71,7 @@
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#define SOC_BOD_SUPPORTED 1
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#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
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#define SOC_PMU_SUPPORTED 1
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#define SOC_PMU_PVT_SUPPORTED 1
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#define SOC_PAU_SUPPORTED 1
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#define SOC_RTC_TIMER_V2_SUPPORTED 1
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#define SOC_LP_AON_SUPPORTED 1
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -77,6 +77,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
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#define SYSTIMER_RETENTION_LINK_LEN 19
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extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
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/**
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* @brief Provide access to pvt configuration registers retention
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* context definition.
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*
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* This is an internal function of the sleep retention driver, and is not
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* useful for external use.
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*/
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#define PVT_RETENTION_LINK_LEN 1
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extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
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#ifdef __cplusplus
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}
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#endif
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -363,10 +363,12 @@ extern "C" {
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/** PVT_DBIAS_CMD0 : R/W; bitpos: [16:0]; default: 0;
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* needs field desc
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*/
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#define PVT_DBIAS_CMD0 0x0001FFFFU
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#define PVT_DBIAS_CMD0_M (PVT_DBIAS_CMD0_V << PVT_DBIAS_CMD0_S)
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#define PVT_DBIAS_CMD0_V 0x0001FFFFU
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#define PVT_DBIAS_CMD0_S 0
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#define PVT_DBIAS_CMD0_OFFSET_FLAG 1
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#define PVT_DBIAS_CMD0_OFFSET_FLAG_S 16
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#define PVT_DBIAS_CMD0_OFFSET_VALUE 0x1F
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#define PVT_DBIAS_CMD0_OFFSET_VALUE_S 11
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#define PVT_DBIAS_CMD0_PVT 0x7FF
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#define PVT_DBIAS_CMD0_PVT_S 0
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/** PVT_DBIAS_CMD1_REG register
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* needs desc
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@@ -375,10 +377,12 @@ extern "C" {
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/** PVT_DBIAS_CMD1 : R/W; bitpos: [16:0]; default: 0;
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* needs field desc
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*/
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#define PVT_DBIAS_CMD1 0x0001FFFFU
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#define PVT_DBIAS_CMD1_M (PVT_DBIAS_CMD1_V << PVT_DBIAS_CMD1_S)
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#define PVT_DBIAS_CMD1_V 0x0001FFFFU
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#define PVT_DBIAS_CMD1_S 0
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#define PVT_DBIAS_CMD1_OFFSET_FLAG 1
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#define PVT_DBIAS_CMD1_OFFSET_FLAG_S 16
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#define PVT_DBIAS_CMD1_OFFSET_VALUE 0x1F
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#define PVT_DBIAS_CMD1_OFFSET_VALUE_S 11
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#define PVT_DBIAS_CMD1_PVT 0x7FF
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#define PVT_DBIAS_CMD1_PVT_S 0
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/** PVT_DBIAS_CMD2_REG register
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* needs desc
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@@ -387,10 +391,12 @@ extern "C" {
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/** PVT_DBIAS_CMD2 : R/W; bitpos: [16:0]; default: 0;
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* needs field desc
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*/
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#define PVT_DBIAS_CMD2 0x0001FFFFU
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#define PVT_DBIAS_CMD2_M (PVT_DBIAS_CMD2_V << PVT_DBIAS_CMD2_S)
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#define PVT_DBIAS_CMD2_V 0x0001FFFFU
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#define PVT_DBIAS_CMD2_S 0
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#define PVT_DBIAS_CMD2_OFFSET_FLAG 1
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#define PVT_DBIAS_CMD2_OFFSET_FLAG_S 16
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#define PVT_DBIAS_CMD2_OFFSET_VALUE 0x1F
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#define PVT_DBIAS_CMD2_OFFSET_VALUE_S 11
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#define PVT_DBIAS_CMD2_PVT 0x7FF
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#define PVT_DBIAS_CMD2_PVT_S 0
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/** PVT_DBIAS_CMD3_REG register
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* needs desc
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -347,10 +347,18 @@ typedef union {
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*/
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typedef union {
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struct {
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/** dbias_cmd0 : R/W; bitpos: [16:0]; default: 0;
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/** dbias_cmd0 : R/W; bitpos: [10:0]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd0:17;
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uint32_t dbias_cmd0_pvt:11;
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/** dbias_cmd0_offset_value : R/W; bitpos: [15:11]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd0_offset_value:5;
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/** dbias_cmd0_offset_flag : R/W; bitpos: [16]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd0_offset_flag:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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@@ -361,10 +369,18 @@ typedef union {
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*/
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typedef union {
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struct {
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/** dbias_cmd1 : R/W; bitpos: [16:0]; default: 0;
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/** dbias_cmd1 : R/W; bitpos: [10:0]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd1:17;
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uint32_t dbias_cmd1_pvt:11;
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/** dbias_cmd1_offset_value : R/W; bitpos: [15:11]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd1_offset_value:5;
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/** dbias_cmd1_offset_flag : R/W; bitpos: [16]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd1_offset_flag:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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@@ -375,10 +391,18 @@ typedef union {
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*/
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typedef union {
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struct {
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/** dbias_cmd2 : R/W; bitpos: [16:0]; default: 0;
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/** dbias_cmd2 : R/W; bitpos: [10:0]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd2:17;
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uint32_t dbias_cmd2_pvt:11;
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/** dbias_cmd2_offset_value : R/W; bitpos: [15:11]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd2_offset_value:5;
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/** dbias_cmd2_offset_flag : R/W; bitpos: [16]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd2_offset_flag:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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@@ -37,6 +37,7 @@
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#define DR_REG_SLCHOST_BASE 0x60018000
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#define DR_REG_PVT_MONITOR_BASE 0x60019000
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#define DR_REG_PSRAM_MEM_MONITOR_BASE 0x6001A000
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#define DR_REG_PVT_BASE DR_REG_PVT_MONITOR_BASE
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/**
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* @brief Peripheral 1 Modules
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@@ -123,6 +123,10 @@ config SOC_RTC_TIMER_V2_SUPPORTED
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bool
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default y
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config SOC_PMU_PVT_SUPPORTED
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bool
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default y
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config SOC_LP_AON_SUPPORTED
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bool
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default y
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@@ -55,6 +55,7 @@
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#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
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#define SOC_PMU_SUPPORTED 1
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#define SOC_RTC_TIMER_V2_SUPPORTED 1
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#define SOC_PMU_PVT_SUPPORTED 1
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#define SOC_LP_AON_SUPPORTED 1
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#define SOC_CLK_TREE_SUPPORTED 1
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#define SOC_ASSIST_DEBUG_SUPPORTED 1
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -77,6 +77,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
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#define SYSTIMER_RETENTION_LINK_LEN 19
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extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
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/**
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* @brief Provide access to pvt configuration registers retention
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* context definition.
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*
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* This is an internal function of the sleep retention driver, and is not
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* useful for external use.
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*/
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#define PVT_RETENTION_LINK_LEN 1
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extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
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#ifdef __cplusplus
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}
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#endif
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -363,10 +363,12 @@ extern "C" {
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/** PVT_DBIAS_CMD0 : R/W; bitpos: [16:0]; default: 0;
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* needs field desc
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*/
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#define PVT_DBIAS_CMD0 0x0001FFFFU
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#define PVT_DBIAS_CMD0_M (PVT_DBIAS_CMD0_V << PVT_DBIAS_CMD0_S)
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#define PVT_DBIAS_CMD0_V 0x0001FFFFU
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#define PVT_DBIAS_CMD0_S 0
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#define PVT_DBIAS_CMD0_OFFSET_FLAG 1
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#define PVT_DBIAS_CMD0_OFFSET_FLAG_S 16
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#define PVT_DBIAS_CMD0_OFFSET_VALUE 0x1F
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#define PVT_DBIAS_CMD0_OFFSET_VALUE_S 11
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#define PVT_DBIAS_CMD0_PVT 0x7FF
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#define PVT_DBIAS_CMD0_PVT_S 0
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/** PVT_DBIAS_CMD1_REG register
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* needs desc
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@@ -375,10 +377,12 @@ extern "C" {
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/** PVT_DBIAS_CMD1 : R/W; bitpos: [16:0]; default: 0;
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* needs field desc
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*/
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#define PVT_DBIAS_CMD1 0x0001FFFFU
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#define PVT_DBIAS_CMD1_M (PVT_DBIAS_CMD1_V << PVT_DBIAS_CMD1_S)
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#define PVT_DBIAS_CMD1_V 0x0001FFFFU
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#define PVT_DBIAS_CMD1_S 0
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#define PVT_DBIAS_CMD1_OFFSET_FLAG 1
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#define PVT_DBIAS_CMD1_OFFSET_FLAG_S 16
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#define PVT_DBIAS_CMD1_OFFSET_VALUE 0x1F
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#define PVT_DBIAS_CMD1_OFFSET_VALUE_S 11
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#define PVT_DBIAS_CMD1_PVT 0x7FF
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#define PVT_DBIAS_CMD1_PVT_S 0
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/** PVT_DBIAS_CMD2_REG register
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* needs desc
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@@ -387,10 +391,12 @@ extern "C" {
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/** PVT_DBIAS_CMD2 : R/W; bitpos: [16:0]; default: 0;
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* needs field desc
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*/
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#define PVT_DBIAS_CMD2 0x0001FFFFU
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#define PVT_DBIAS_CMD2_M (PVT_DBIAS_CMD2_V << PVT_DBIAS_CMD2_S)
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#define PVT_DBIAS_CMD2_V 0x0001FFFFU
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#define PVT_DBIAS_CMD2_S 0
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#define PVT_DBIAS_CMD2_OFFSET_FLAG 1
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#define PVT_DBIAS_CMD2_OFFSET_FLAG_S 16
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#define PVT_DBIAS_CMD2_OFFSET_VALUE 0x1F
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#define PVT_DBIAS_CMD2_OFFSET_VALUE_S 11
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#define PVT_DBIAS_CMD2_PVT 0x7FF
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#define PVT_DBIAS_CMD2_PVT_S 0
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/** PVT_DBIAS_CMD3_REG register
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* needs desc
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -347,10 +347,18 @@ typedef union {
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*/
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typedef union {
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struct {
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/** dbias_cmd0 : R/W; bitpos: [16:0]; default: 0;
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/** dbias_cmd0 : R/W; bitpos: [10:0]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd0:17;
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uint32_t dbias_cmd0_pvt:11;
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/** dbias_cmd0_offset_value : R/W; bitpos: [15:11]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd0_offset_value:5;
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/** dbias_cmd0_offset_flag : R/W; bitpos: [16]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd0_offset_flag:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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@@ -361,10 +369,18 @@ typedef union {
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*/
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typedef union {
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struct {
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/** dbias_cmd1 : R/W; bitpos: [16:0]; default: 0;
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/** dbias_cmd1 : R/W; bitpos: [10:0]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd1:17;
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uint32_t dbias_cmd1_pvt:11;
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/** dbias_cmd1_offset_value : R/W; bitpos: [15:11]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd1_offset_value:5;
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/** dbias_cmd1_offset_flag : R/W; bitpos: [16]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd1_offset_flag:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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@@ -375,10 +391,18 @@ typedef union {
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*/
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typedef union {
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struct {
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/** dbias_cmd2 : R/W; bitpos: [16:0]; default: 0;
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/** dbias_cmd2 : R/W; bitpos: [10:0]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd2:17;
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uint32_t dbias_cmd2_pvt:11;
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/** dbias_cmd2_offset_value : R/W; bitpos: [15:11]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd2_offset_value:5;
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/** dbias_cmd2_offset_flag : R/W; bitpos: [16]; default: 0;
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* needs field desc
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*/
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uint32_t dbias_cmd2_offset_flag:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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