Merge branch 'feature/support_pvt_auto_dbias_c5_c61_p4_c6' into 'release/v6.0'

feat(pvt): support pvt auto dbiast on c5/c61/c6/p4 (from eco5)_v6.0

See merge request espressif/esp-idf!45385
This commit is contained in:
Jiang Jiang Jian
2026-02-01 20:08:23 +08:00
33 changed files with 685 additions and 66 deletions
@@ -195,6 +195,10 @@ config SOC_PMU_SUPPORTED
bool
default y
config SOC_PMU_PVT_SUPPORTED
bool
default y
config SOC_PAU_SUPPORTED
bool
default y
@@ -71,6 +71,7 @@
#define SOC_BOD_SUPPORTED 1
#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
#define SOC_PMU_SUPPORTED 1
#define SOC_PMU_PVT_SUPPORTED 1
#define SOC_PAU_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -77,6 +77,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
#define SYSTIMER_RETENTION_LINK_LEN 19
extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
/**
* @brief Provide access to pvt configuration registers retention
* context definition.
*
* This is an internal function of the sleep retention driver, and is not
* useful for external use.
*/
#define PVT_RETENTION_LINK_LEN 1
extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
#ifdef __cplusplus
}
#endif
+19 -13
View File
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -363,10 +363,12 @@ extern "C" {
/** PVT_DBIAS_CMD0 : R/W; bitpos: [16:0]; default: 0;
* needs field desc
*/
#define PVT_DBIAS_CMD0 0x0001FFFFU
#define PVT_DBIAS_CMD0_M (PVT_DBIAS_CMD0_V << PVT_DBIAS_CMD0_S)
#define PVT_DBIAS_CMD0_V 0x0001FFFFU
#define PVT_DBIAS_CMD0_S 0
#define PVT_DBIAS_CMD0_OFFSET_FLAG 1
#define PVT_DBIAS_CMD0_OFFSET_FLAG_S 16
#define PVT_DBIAS_CMD0_OFFSET_VALUE 0x1F
#define PVT_DBIAS_CMD0_OFFSET_VALUE_S 11
#define PVT_DBIAS_CMD0_PVT 0x7FF
#define PVT_DBIAS_CMD0_PVT_S 0
/** PVT_DBIAS_CMD1_REG register
* needs desc
@@ -375,10 +377,12 @@ extern "C" {
/** PVT_DBIAS_CMD1 : R/W; bitpos: [16:0]; default: 0;
* needs field desc
*/
#define PVT_DBIAS_CMD1 0x0001FFFFU
#define PVT_DBIAS_CMD1_M (PVT_DBIAS_CMD1_V << PVT_DBIAS_CMD1_S)
#define PVT_DBIAS_CMD1_V 0x0001FFFFU
#define PVT_DBIAS_CMD1_S 0
#define PVT_DBIAS_CMD1_OFFSET_FLAG 1
#define PVT_DBIAS_CMD1_OFFSET_FLAG_S 16
#define PVT_DBIAS_CMD1_OFFSET_VALUE 0x1F
#define PVT_DBIAS_CMD1_OFFSET_VALUE_S 11
#define PVT_DBIAS_CMD1_PVT 0x7FF
#define PVT_DBIAS_CMD1_PVT_S 0
/** PVT_DBIAS_CMD2_REG register
* needs desc
@@ -387,10 +391,12 @@ extern "C" {
/** PVT_DBIAS_CMD2 : R/W; bitpos: [16:0]; default: 0;
* needs field desc
*/
#define PVT_DBIAS_CMD2 0x0001FFFFU
#define PVT_DBIAS_CMD2_M (PVT_DBIAS_CMD2_V << PVT_DBIAS_CMD2_S)
#define PVT_DBIAS_CMD2_V 0x0001FFFFU
#define PVT_DBIAS_CMD2_S 0
#define PVT_DBIAS_CMD2_OFFSET_FLAG 1
#define PVT_DBIAS_CMD2_OFFSET_FLAG_S 16
#define PVT_DBIAS_CMD2_OFFSET_VALUE 0x1F
#define PVT_DBIAS_CMD2_OFFSET_VALUE_S 11
#define PVT_DBIAS_CMD2_PVT 0x7FF
#define PVT_DBIAS_CMD2_PVT_S 0
/** PVT_DBIAS_CMD3_REG register
* needs desc
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -347,10 +347,18 @@ typedef union {
*/
typedef union {
struct {
/** dbias_cmd0 : R/W; bitpos: [16:0]; default: 0;
/** dbias_cmd0 : R/W; bitpos: [10:0]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd0:17;
uint32_t dbias_cmd0_pvt:11;
/** dbias_cmd0_offset_value : R/W; bitpos: [15:11]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd0_offset_value:5;
/** dbias_cmd0_offset_flag : R/W; bitpos: [16]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd0_offset_flag:1;
uint32_t reserved_17:15;
};
uint32_t val;
@@ -361,10 +369,18 @@ typedef union {
*/
typedef union {
struct {
/** dbias_cmd1 : R/W; bitpos: [16:0]; default: 0;
/** dbias_cmd1 : R/W; bitpos: [10:0]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd1:17;
uint32_t dbias_cmd1_pvt:11;
/** dbias_cmd1_offset_value : R/W; bitpos: [15:11]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd1_offset_value:5;
/** dbias_cmd1_offset_flag : R/W; bitpos: [16]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd1_offset_flag:1;
uint32_t reserved_17:15;
};
uint32_t val;
@@ -375,10 +391,18 @@ typedef union {
*/
typedef union {
struct {
/** dbias_cmd2 : R/W; bitpos: [16:0]; default: 0;
/** dbias_cmd2 : R/W; bitpos: [10:0]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd2:17;
uint32_t dbias_cmd2_pvt:11;
/** dbias_cmd2_offset_value : R/W; bitpos: [15:11]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd2_offset_value:5;
/** dbias_cmd2_offset_flag : R/W; bitpos: [16]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd2_offset_flag:1;
uint32_t reserved_17:15;
};
uint32_t val;
@@ -37,6 +37,7 @@
#define DR_REG_SLCHOST_BASE 0x60018000
#define DR_REG_PVT_MONITOR_BASE 0x60019000
#define DR_REG_PSRAM_MEM_MONITOR_BASE 0x6001A000
#define DR_REG_PVT_BASE DR_REG_PVT_MONITOR_BASE
/**
* @brief Peripheral 1 Modules
@@ -123,6 +123,10 @@ config SOC_RTC_TIMER_V2_SUPPORTED
bool
default y
config SOC_PMU_PVT_SUPPORTED
bool
default y
config SOC_LP_AON_SUPPORTED
bool
default y
@@ -55,6 +55,7 @@
#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
#define SOC_PMU_SUPPORTED 1
#define SOC_RTC_TIMER_V2_SUPPORTED 1
#define SOC_PMU_PVT_SUPPORTED 1
#define SOC_LP_AON_SUPPORTED 1
#define SOC_CLK_TREE_SUPPORTED 1
#define SOC_ASSIST_DEBUG_SUPPORTED 1
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -77,6 +77,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
#define SYSTIMER_RETENTION_LINK_LEN 19
extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
/**
* @brief Provide access to pvt configuration registers retention
* context definition.
*
* This is an internal function of the sleep retention driver, and is not
* useful for external use.
*/
#define PVT_RETENTION_LINK_LEN 1
extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
#ifdef __cplusplus
}
#endif
+19 -13
View File
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -363,10 +363,12 @@ extern "C" {
/** PVT_DBIAS_CMD0 : R/W; bitpos: [16:0]; default: 0;
* needs field desc
*/
#define PVT_DBIAS_CMD0 0x0001FFFFU
#define PVT_DBIAS_CMD0_M (PVT_DBIAS_CMD0_V << PVT_DBIAS_CMD0_S)
#define PVT_DBIAS_CMD0_V 0x0001FFFFU
#define PVT_DBIAS_CMD0_S 0
#define PVT_DBIAS_CMD0_OFFSET_FLAG 1
#define PVT_DBIAS_CMD0_OFFSET_FLAG_S 16
#define PVT_DBIAS_CMD0_OFFSET_VALUE 0x1F
#define PVT_DBIAS_CMD0_OFFSET_VALUE_S 11
#define PVT_DBIAS_CMD0_PVT 0x7FF
#define PVT_DBIAS_CMD0_PVT_S 0
/** PVT_DBIAS_CMD1_REG register
* needs desc
@@ -375,10 +377,12 @@ extern "C" {
/** PVT_DBIAS_CMD1 : R/W; bitpos: [16:0]; default: 0;
* needs field desc
*/
#define PVT_DBIAS_CMD1 0x0001FFFFU
#define PVT_DBIAS_CMD1_M (PVT_DBIAS_CMD1_V << PVT_DBIAS_CMD1_S)
#define PVT_DBIAS_CMD1_V 0x0001FFFFU
#define PVT_DBIAS_CMD1_S 0
#define PVT_DBIAS_CMD1_OFFSET_FLAG 1
#define PVT_DBIAS_CMD1_OFFSET_FLAG_S 16
#define PVT_DBIAS_CMD1_OFFSET_VALUE 0x1F
#define PVT_DBIAS_CMD1_OFFSET_VALUE_S 11
#define PVT_DBIAS_CMD1_PVT 0x7FF
#define PVT_DBIAS_CMD1_PVT_S 0
/** PVT_DBIAS_CMD2_REG register
* needs desc
@@ -387,10 +391,12 @@ extern "C" {
/** PVT_DBIAS_CMD2 : R/W; bitpos: [16:0]; default: 0;
* needs field desc
*/
#define PVT_DBIAS_CMD2 0x0001FFFFU
#define PVT_DBIAS_CMD2_M (PVT_DBIAS_CMD2_V << PVT_DBIAS_CMD2_S)
#define PVT_DBIAS_CMD2_V 0x0001FFFFU
#define PVT_DBIAS_CMD2_S 0
#define PVT_DBIAS_CMD2_OFFSET_FLAG 1
#define PVT_DBIAS_CMD2_OFFSET_FLAG_S 16
#define PVT_DBIAS_CMD2_OFFSET_VALUE 0x1F
#define PVT_DBIAS_CMD2_OFFSET_VALUE_S 11
#define PVT_DBIAS_CMD2_PVT 0x7FF
#define PVT_DBIAS_CMD2_PVT_S 0
/** PVT_DBIAS_CMD3_REG register
* needs desc
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -347,10 +347,18 @@ typedef union {
*/
typedef union {
struct {
/** dbias_cmd0 : R/W; bitpos: [16:0]; default: 0;
/** dbias_cmd0 : R/W; bitpos: [10:0]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd0:17;
uint32_t dbias_cmd0_pvt:11;
/** dbias_cmd0_offset_value : R/W; bitpos: [15:11]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd0_offset_value:5;
/** dbias_cmd0_offset_flag : R/W; bitpos: [16]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd0_offset_flag:1;
uint32_t reserved_17:15;
};
uint32_t val;
@@ -361,10 +369,18 @@ typedef union {
*/
typedef union {
struct {
/** dbias_cmd1 : R/W; bitpos: [16:0]; default: 0;
/** dbias_cmd1 : R/W; bitpos: [10:0]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd1:17;
uint32_t dbias_cmd1_pvt:11;
/** dbias_cmd1_offset_value : R/W; bitpos: [15:11]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd1_offset_value:5;
/** dbias_cmd1_offset_flag : R/W; bitpos: [16]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd1_offset_flag:1;
uint32_t reserved_17:15;
};
uint32_t val;
@@ -375,10 +391,18 @@ typedef union {
*/
typedef union {
struct {
/** dbias_cmd2 : R/W; bitpos: [16:0]; default: 0;
/** dbias_cmd2 : R/W; bitpos: [10:0]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd2:17;
uint32_t dbias_cmd2_pvt:11;
/** dbias_cmd2_offset_value : R/W; bitpos: [15:11]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd2_offset_value:5;
/** dbias_cmd2_offset_flag : R/W; bitpos: [16]; default: 0;
* needs field desc
*/
uint32_t dbias_cmd2_offset_flag:1;
uint32_t reserved_17:15;
};
uint32_t val;