feat: enable AES, SHA, RSA and ECC support for ESP32S31

Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
This commit is contained in:
Aditya Patwardhan
2026-04-13 10:20:44 +05:30
committed by nilesh.kale
co-authored by Nilesh Kale
parent 338f341110
commit bfd3e191bc
10 changed files with 1202 additions and 8 deletions
@@ -11,6 +11,5 @@
static inline void esp_crypto_clk_init(void)
{
// Set crypto clock (`clk_sec`) to use 240M PLL clock
// TODO: ["ESP32S31"] IDF-14629
// REG_SET_FIELD(HP_SYS_CLKRST_CRYPTO_CTRL0_REG, HP_SYS_CLKRST_REG_CRYPTO_CLK_SRC_SEL, 0x2);
REG_SET_FIELD(HP_SYS_CLKRST_CRYPTO_CTRL0_REG, HP_SYS_CLKRST_REG_CRYPTO_CLK_SRC_SEL, 0x2);
}