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feat: enable AES, SHA, RSA and ECC support for ESP32S31
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
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nilesh.kale
co-authored by
Nilesh Kale
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338f341110
commit
bfd3e191bc
@@ -11,6 +11,5 @@
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static inline void esp_crypto_clk_init(void)
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{
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// Set crypto clock (`clk_sec`) to use 240M PLL clock
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// TODO: ["ESP32S31"] IDF-14629
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// REG_SET_FIELD(HP_SYS_CLKRST_CRYPTO_CTRL0_REG, HP_SYS_CLKRST_REG_CRYPTO_CLK_SRC_SEL, 0x2);
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REG_SET_FIELD(HP_SYS_CLKRST_CRYPTO_CTRL0_REG, HP_SYS_CLKRST_REG_CRYPTO_CLK_SRC_SEL, 0x2);
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}
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