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fix(p4_eco6): Fix_vdddig_big_bug when boot

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chaijie@espressif.com
2026-01-26 09:58:25 +08:00
committed by BOT
parent 48e7e0618d
commit be3a71a585
1 changed files with 6 additions and 1 deletions
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components/esp_hw_support/port/esp32p4/rtc_clk_init.c
+6 -1
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@@ -67,14 +67,19 @@ void rtc_clk_init(rtc_clk_config_t cfg)
hp_dcmvset = pvt_hp_dcmvset; hp_dcmvset = pvt_hp_dcmvset;
} }
// Switch to DCDC // Switch to DCDC
unsigned chip_version = efuse_hal_chip_revision();
if (ESP_CHIP_REV_ABOVE(chip_version, 301)) {
SET_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_FB_RES_FORCE_PD);
}
pmu_ll_set_dcdc_en(&PMU, true); pmu_ll_set_dcdc_en(&PMU, true);
pmu_ll_set_dcdc_switch_force_power_down(&PMU, false); pmu_ll_set_dcdc_switch_force_power_down(&PMU, false);
pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, hp_dcmvset); pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, hp_dcmvset);
SET_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_DIG_REGULATOR0_DBIAS_SEL); // Hand over control of dbias to pmu SET_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_DIG_REGULATOR0_DBIAS_SEL); // Hand over control of dbias to pmu
esp_rom_delay_us(1000); esp_rom_delay_us(1000);
unsigned chip_version = efuse_hal_chip_revision();
if (ESP_CHIP_REV_ABOVE(chip_version, 301)) { if (ESP_CHIP_REV_ABOVE(chip_version, 301)) {
REG_SET_FIELD(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_SEL, 0xEF);// lp_fib_sel bit4 set to 0: select dig_fib_reg instead of ana_fib_reg REG_SET_FIELD(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_SEL, 0xEF);// lp_fib_sel bit4 set to 0: select dig_fib_reg instead of ana_fib_reg
CLEAR_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_FB_RES_FORCE_PD);
esp_rom_delay_us(10);
} }
pmu_ll_hp_set_regulator_xpd(&PMU, PMU_MODE_HP_ACTIVE, false); pmu_ll_hp_set_regulator_xpd(&PMU, PMU_MODE_HP_ACTIVE, false);