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https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
refactor(gdma): increase performance and optimize api
This commit is contained in:
committed by
Chen Ji Chang
parent
305d434bda
commit
bd2d64bffb
@@ -211,9 +211,9 @@ static esp_err_t uhci_gdma_initialize(uhci_controller_handle_t uhci_ctrl, const
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gdma_apply_strategy(uhci_ctrl->tx_dir.dma_chan, &strategy_config);
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// create DMA link list
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size_t tx_dma_int_mem_alignment = 0, tx_dma_ext_mem_alignment = 0;
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gdma_get_channel_alignment_constraints(uhci_ctrl->tx_dir.dma_chan, &tx_dma_int_mem_alignment, &tx_dma_ext_mem_alignment, NULL);
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size_t buffer_alignment = MAX(tx_dma_int_mem_alignment, tx_dma_ext_mem_alignment);
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gdma_channel_alignment_info_t tx_align_info;
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gdma_get_channel_alignment_constraints(uhci_ctrl->tx_dir.dma_chan, &tx_align_info);
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size_t buffer_alignment = MAX(tx_align_info.int_mem_alignment, tx_align_info.ext_enc_mem_alignment);
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// Given that the combined size of all buffers does not exceed `max_transmit_size` and
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// the number of buffers does not exceed `max_transmit_buffer_count`, a single transfer
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// requires at most `esp_dma_calculate_node_count(max_transmit_size) + max_transmit_buffer_count - 1` DMA descriptors.
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@@ -236,9 +236,9 @@ static esp_err_t uhci_gdma_initialize(uhci_controller_handle_t uhci_ctrl, const
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gdma_connect(uhci_ctrl->rx_dir.dma_chan, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_UHCI, 0));
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ESP_RETURN_ON_ERROR(gdma_config_transfer(uhci_ctrl->rx_dir.dma_chan, &transfer_cfg), TAG, "Config DMA rx channel transfer failed");
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size_t rx_dma_int_mem_alignment = 0, rx_dma_ext_mem_alignment = 0;
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gdma_get_channel_alignment_constraints(uhci_ctrl->rx_dir.dma_chan, &rx_dma_int_mem_alignment, &rx_dma_ext_mem_alignment, NULL);
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buffer_alignment = MAX(rx_dma_int_mem_alignment, rx_dma_ext_mem_alignment);
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gdma_channel_alignment_info_t rx_align_info;
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gdma_get_channel_alignment_constraints(uhci_ctrl->rx_dir.dma_chan, &rx_align_info);
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buffer_alignment = MAX(rx_align_info.int_mem_alignment, rx_align_info.ext_enc_mem_alignment);
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uhci_ctrl->rx_dir.rx_num_dma_nodes = esp_dma_calculate_node_count(config->max_receive_internal_mem, buffer_alignment, DMA_DESCRIPTOR_BUFFER_MAX_SIZE);
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dma_link_config.num_items = uhci_ctrl->rx_dir.rx_num_dma_nodes;
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ESP_RETURN_ON_ERROR(gdma_new_link_list(&dma_link_config, &uhci_ctrl->rx_dir.dma_link), TAG, "DMA rx link list alloc failed");
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@@ -284,11 +284,10 @@ static void uhci_do_transmit(uhci_controller_handle_t uhci_ctrl, uhci_transactio
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uhci_ctrl->tx_dir.cur_trans = trans;
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size_t buf_count = trans->buf_info_count;
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gdma_buffer_mount_config_t *mount_configs = uhci_ctrl->tx_dir.mount_configs;
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size_t buffer_alignment = 0;
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for (size_t i = 0; i < buf_count; i++) {
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bool is_last = (i == buf_count - 1);
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buffer_alignment = gdma_get_buffer_alignment_constraint(uhci_ctrl->tx_dir.dma_chan, trans->buf_info[i].write_buffer);
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size_t buffer_alignment = gdma_get_buffer_alignment_constraint(uhci_ctrl->tx_dir.dma_chan, trans->buf_info[i].write_buffer);
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mount_configs[i] = (gdma_buffer_mount_config_t) {
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.buffer = (void *)trans->buf_info[i].write_buffer,
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.buffer_alignment = buffer_alignment,
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@@ -367,7 +366,6 @@ static esp_err_t uhci_receive_internal(uhci_controller_handle_t uhci_ctrl, uint8
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ESP_GOTO_ON_FALSE_ISR(uhci_ctrl->rx_dir.buffer_size_per_desc_node[i] != 0 && uhci_ctrl->rx_dir.buffer_size_per_desc_node[i] <= DMA_DESCRIPTOR_BUFFER_MAX_SIZE,
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ESP_ERR_INVALID_ARG, err, TAG, "buffer_size is too small or too large");
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size_t buffer_alignment = 0;
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buffer_alignment = gdma_get_buffer_alignment_constraint(uhci_ctrl->rx_dir.dma_chan, read_buffer);
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mount_configs[i] = (gdma_buffer_mount_config_t) {
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.buffer = read_buffer,
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@@ -375,7 +373,6 @@ static esp_err_t uhci_receive_internal(uhci_controller_handle_t uhci_ctrl, uint8
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.length = uhci_ctrl->rx_dir.buffer_size_per_desc_node[i],
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.flags = {
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.mark_final = GDMA_FINAL_LINK_TO_DEFAULT,
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.check_size_align = gdma_is_size_alignment_required(uhci_ctrl->rx_dir.dma_chan),
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}
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};
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ESP_DRAM_LOGD(TAG, "The DMA node %d has %d byte", i, uhci_ctrl->rx_dir.buffer_size_per_desc_node[i]);
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