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feat(uart): spilt LP and HP uart set_baudrate function

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This commit is contained in:
gaoxu
2023-10-08 10:10:02 +08:00
parent 4f24f805cc
commit bc2a6bd730
17 changed files with 155 additions and 119 deletions
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components/soc/esp32p4/include/soc/clk_tree_defs.h
+6 -1
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@@ -278,7 +278,12 @@ typedef enum {
LP_UART_SCLK_LP_FAST = SOC_MOD_CLK_RTC_FAST, /*!< LP_UART source clock is LP(RTC)_FAST */
LP_UART_SCLK_XTAL_D2 = SOC_MOD_CLK_XTAL_D2, /*!< LP_UART source clock is XTAL_D2 */
LP_UART_SCLK_LP_PLL = SOC_MOD_CLK_LP_PLL, /*!< LP_UART source clock is LP_PLL (8M PLL) */
LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_XTAL_D2, /*!< LP_UART source clock default choice is XTAL_D2 */
#if SOC_CLK_TREE_SUPPORTED
LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_RTC_FAST,
#else
LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_XTAL_D2, /*!< LP_UART source clock default choice is XTAL_D2 */
#endif
} soc_periph_lp_uart_clk_src_t;
//////////////////////////////////////////////////MCPWM/////////////////////////////////////////////////////////////////