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https://github.com/espressif/esp-idf.git
synced 2026-10-02 03:00:34 +03:00
feat(esp_tee): Support for ESP32-C61 - the esp_tee component
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@@ -5,27 +5,32 @@
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*/
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#include <stdarg.h>
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#include "soc/soc_caps.h"
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#include "esp_err.h"
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#include "esp_random.h"
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#include "hal/sha_types.h"
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#include "hal/sha_hal.h"
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#include "rom/digital_signature.h"
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#include "hal/mmu_types.h"
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#include "hal/wdt_hal.h"
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#include "hal/spi_flash_hal.h"
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#include "hal/spi_flash_types.h"
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#include "esp_private/mspi_timing_tuning.h"
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#if SOC_SHA_SUPPORTED
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#include "hal/sha_types.h"
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#include "hal/sha_hal.h"
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#endif
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#if SOC_HMAC_SUPPORTED
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#include "esp_hmac.h"
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#endif
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#if SOC_DIG_SIGN_SUPPORTED
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#include "esp_ds.h"
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#include "rom/digital_signature.h"
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#endif
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#include "esp_crypto_lock.h"
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#include "esp_flash.h"
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#include "soc/soc_caps.h"
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#include "sdkconfig.h"
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#include "esp_tee.h"
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#include "secure_service_num.h"
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#include "sdkconfig.h"
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/* ---------------------------------------------- Interrupts ------------------------------------------------- */
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@@ -43,18 +48,19 @@ void IRAM_ATTR __wrap_esprv_int_set_vectored(int rv_int_num, bool vectored)
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/* ---------------------------------------------- RTC_WDT ------------------------------------------------- */
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void __wrap_wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
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void IRAM_ATTR __wrap_wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
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{
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esp_tee_service_call(5, SS_WDT_HAL_INIT, hal, wdt_inst, prescaler, enable_intr);
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}
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void __wrap_wdt_hal_deinit(wdt_hal_context_t *hal)
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void IRAM_ATTR __wrap_wdt_hal_deinit(wdt_hal_context_t *hal)
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{
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esp_tee_service_call(2, SS_WDT_HAL_DEINIT, hal);
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}
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/* ---------------------------------------------- AES ------------------------------------------------- */
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#if SOC_AES_SUPPORTED
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typedef struct {
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uint8_t key_bytes;
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volatile uint8_t key_in_hardware; /* This variable is used for fault injection checks, so marked volatile to avoid optimisation */
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@@ -148,9 +154,10 @@ int __wrap_esp_aes_crypt_ofb(esp_aes_context *ctx,
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esp_crypto_sha_aes_lock_release();
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return err;
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}
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#endif
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/* ---------------------------------------------- SHA ------------------------------------------------- */
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#if SOC_SHA_SUPPORTED
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typedef enum {
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ESP_SHA1_STATE_INIT,
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ESP_SHA1_STATE_IN_PROCESS
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@@ -238,9 +245,11 @@ int __wrap_esp_sha_512_t_init_hash(uint16_t t)
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return esp_tee_service_call(2, SS_ESP_SHA_512_T_INIT_HASH, t);
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}
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#endif
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#endif
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/* ---------------------------------------------- HMAC ------------------------------------------------- */
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#if SOC_HMAC_SUPPORTED
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esp_err_t __wrap_esp_hmac_calculate(hmac_key_id_t key_id, const void *message, size_t message_len, uint8_t *hmac)
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{
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esp_crypto_hmac_lock_acquire();
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@@ -264,9 +273,11 @@ esp_err_t __wrap_esp_hmac_jtag_disable(void)
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esp_crypto_hmac_lock_release();
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return err;
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}
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#endif
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/* ---------------------------------------------- DS ------------------------------------------------- */
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#if SOC_DIG_SIGN_SUPPORTED
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esp_err_t __wrap_esp_ds_sign(const void *message,
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const esp_ds_data_t *data,
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hmac_key_id_t key_id,
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@@ -318,16 +329,20 @@ esp_err_t __wrap_esp_ds_encrypt_params(esp_ds_data_t *data,
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esp_crypto_sha_aes_lock_release();
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return err;
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}
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#endif
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/* ---------------------------------------------- MPI ------------------------------------------------- */
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#if SOC_MPI_SUPPORTED
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void __wrap_esp_crypto_mpi_enable_periph_clk(bool enable)
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{
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esp_tee_service_call(2, SS_ESP_CRYPTO_MPI_ENABLE_PERIPH_CLK, enable);
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}
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#endif
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/* ---------------------------------------------- ECC ------------------------------------------------- */
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#if SOC_ECC_SUPPORTED
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#define P256_LEN (256/8)
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#define P192_LEN (192/8)
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@@ -352,8 +367,9 @@ int __wrap_esp_ecc_point_verify(const ecc_point_t *point)
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esp_crypto_ecc_lock_release();
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return err;
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}
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#endif
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#if SOC_ECDSA_SUPPORTED
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#if SOC_ECC_SUPPORTED && SOC_ECDSA_SUPPORTED
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void __wrap_esp_crypto_ecc_enable_periph_clk(bool enable)
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{
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esp_tee_service_call(2, SS_ESP_CRYPTO_ECC_ENABLE_PERIPH_CLK, enable);
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