feat(esp_tee): Support for ESP32-C61 - the esp_tee component

This commit is contained in:
Laukik Hase
2025-11-07 14:54:11 +05:30
parent c71729610f
commit bbdd1499f1
26 changed files with 1162 additions and 169 deletions
@@ -5,27 +5,32 @@
*/
#include <stdarg.h>
#include "soc/soc_caps.h"
#include "esp_err.h"
#include "esp_random.h"
#include "hal/sha_types.h"
#include "hal/sha_hal.h"
#include "rom/digital_signature.h"
#include "hal/mmu_types.h"
#include "hal/wdt_hal.h"
#include "hal/spi_flash_hal.h"
#include "hal/spi_flash_types.h"
#include "esp_private/mspi_timing_tuning.h"
#if SOC_SHA_SUPPORTED
#include "hal/sha_types.h"
#include "hal/sha_hal.h"
#endif
#if SOC_HMAC_SUPPORTED
#include "esp_hmac.h"
#endif
#if SOC_DIG_SIGN_SUPPORTED
#include "esp_ds.h"
#include "rom/digital_signature.h"
#endif
#include "esp_crypto_lock.h"
#include "esp_flash.h"
#include "soc/soc_caps.h"
#include "sdkconfig.h"
#include "esp_tee.h"
#include "secure_service_num.h"
#include "sdkconfig.h"
/* ---------------------------------------------- Interrupts ------------------------------------------------- */
@@ -43,18 +48,19 @@ void IRAM_ATTR __wrap_esprv_int_set_vectored(int rv_int_num, bool vectored)
/* ---------------------------------------------- RTC_WDT ------------------------------------------------- */
void __wrap_wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
void IRAM_ATTR __wrap_wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
{
esp_tee_service_call(5, SS_WDT_HAL_INIT, hal, wdt_inst, prescaler, enable_intr);
}
void __wrap_wdt_hal_deinit(wdt_hal_context_t *hal)
void IRAM_ATTR __wrap_wdt_hal_deinit(wdt_hal_context_t *hal)
{
esp_tee_service_call(2, SS_WDT_HAL_DEINIT, hal);
}
/* ---------------------------------------------- AES ------------------------------------------------- */
#if SOC_AES_SUPPORTED
typedef struct {
uint8_t key_bytes;
volatile uint8_t key_in_hardware; /* This variable is used for fault injection checks, so marked volatile to avoid optimisation */
@@ -148,9 +154,10 @@ int __wrap_esp_aes_crypt_ofb(esp_aes_context *ctx,
esp_crypto_sha_aes_lock_release();
return err;
}
#endif
/* ---------------------------------------------- SHA ------------------------------------------------- */
#if SOC_SHA_SUPPORTED
typedef enum {
ESP_SHA1_STATE_INIT,
ESP_SHA1_STATE_IN_PROCESS
@@ -238,9 +245,11 @@ int __wrap_esp_sha_512_t_init_hash(uint16_t t)
return esp_tee_service_call(2, SS_ESP_SHA_512_T_INIT_HASH, t);
}
#endif
#endif
/* ---------------------------------------------- HMAC ------------------------------------------------- */
#if SOC_HMAC_SUPPORTED
esp_err_t __wrap_esp_hmac_calculate(hmac_key_id_t key_id, const void *message, size_t message_len, uint8_t *hmac)
{
esp_crypto_hmac_lock_acquire();
@@ -264,9 +273,11 @@ esp_err_t __wrap_esp_hmac_jtag_disable(void)
esp_crypto_hmac_lock_release();
return err;
}
#endif
/* ---------------------------------------------- DS ------------------------------------------------- */
#if SOC_DIG_SIGN_SUPPORTED
esp_err_t __wrap_esp_ds_sign(const void *message,
const esp_ds_data_t *data,
hmac_key_id_t key_id,
@@ -318,16 +329,20 @@ esp_err_t __wrap_esp_ds_encrypt_params(esp_ds_data_t *data,
esp_crypto_sha_aes_lock_release();
return err;
}
#endif
/* ---------------------------------------------- MPI ------------------------------------------------- */
#if SOC_MPI_SUPPORTED
void __wrap_esp_crypto_mpi_enable_periph_clk(bool enable)
{
esp_tee_service_call(2, SS_ESP_CRYPTO_MPI_ENABLE_PERIPH_CLK, enable);
}
#endif
/* ---------------------------------------------- ECC ------------------------------------------------- */
#if SOC_ECC_SUPPORTED
#define P256_LEN (256/8)
#define P192_LEN (192/8)
@@ -352,8 +367,9 @@ int __wrap_esp_ecc_point_verify(const ecc_point_t *point)
esp_crypto_ecc_lock_release();
return err;
}
#endif
#if SOC_ECDSA_SUPPORTED
#if SOC_ECC_SUPPORTED && SOC_ECDSA_SUPPORTED
void __wrap_esp_crypto_ecc_enable_periph_clk(bool enable)
{
esp_tee_service_call(2, SS_ESP_CRYPTO_ECC_ENABLE_PERIPH_CLK, enable);