docs(uart): clarify example pins need a USB-to-UART bridge

This commit is contained in:
Mo Fei Fei
2026-09-10 14:50:43 +08:00
committed by morris
parent 2dc25a7bbe
commit bb2c545085
7 changed files with 21 additions and 2 deletions

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@@ -26,6 +26,10 @@ On {IDF_TARGET_NAME}, ESP-IDF provides implementations of VFS drivers for I/O ov
Standard I/O is not limited to these options, though. See below on enabling custom destinations for standard I/O.
.. note::
The console path is separate from an application UART that you open with the :doc:`UART driver <../api-reference/peripherals/uart>` on other pins. If a UART peripheral provides console output, a USB-to-UART bridge chip is required. Many development boards already include this bridge chip onboard for console communication between the PC and the default UART0. If a USB or USB Serial/JTAG peripheral provides console output, no adapter chip is needed. The USB connector on the development board connects directly to the chip's USB D+/D- pins. Traffic on other UART ports does not appear in ``idf.py monitor`` unless a given port is configured as the console. For details, see :doc:`Establish Serial Connection with {IDF_TARGET_NAME} <../get-started/establish-serial-connection>`.
Configuration
-------------

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@@ -150,6 +150,9 @@ The same macro :c:macro:`UART_PIN_NO_CHANGE` should be specified for pins that w
// Set UART pins(TX: IO4, RX: IO5, RTS: IO18, CTS: IO19, DTR: UNUSED, DSR: UNUSED)
ESP_ERROR_CHECK(uart_set_pin({IDF_TARGET_UART_EXAMPLE_PORT}, 4, 5, 18, 19, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
.. note::
The pin numbers above are only an example. On many development boards, the onboard USB-to-UART bridge is connected to the UART0 default TX/RX pins. If you need to communicate with a PC over other ports or pins, connect a separate USB-to-UART bridge to those pins.
.. _uart-api-running-uart-communication:

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@@ -20,6 +20,8 @@ Some development boards have the USB-to-UART bridge installed. If a board does n
The {IDF_TARGET_NAME} supports the USB peripheral. In this case, the USB-to-UART bridge is not needed and the device can be flashed directly.
The USB peripheral and its USB PHY are separate from the UART controllers. UART controllers output UART signals on GPIOs, so connecting a UART to a PC over USB still requires an onboard or external USB-to-UART bridge.
.. blockdiag::
:scale: 70%
:caption: SoC with Supported USB

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@@ -26,6 +26,10 @@ ESP-IDF 提供了 C 标准输入输出功能,如 ``stdin``、``stdout`` 和 ``
不过,标准 I/O 并不限于这些选项。请参见下文,了解如何为标准 I/O 启用自定义目标。
.. note::
控制台通路与通过 :doc:`UART 驱动 <../api-reference/peripherals/uart>` 在其他管脚上打开的应用 UART 彼此独立。若控制台输出由 UART 外设提供,则需要 USB 至 UART 桥芯片,许多开发板上已板载该桥芯片,用于 PC 与默认 UART0 之间的控制台通信;若控制台输出由 USB 或 USB Serial/JTAG 外设提供,则无需转接芯片,开发板上的 USB 接口直连芯片的 USB D+/D- 管脚。除非将某端口配置为控制台,否则其他 UART 端口上的数据不会出现在 ``idf.py monitor`` 中。有关详细信息,请参阅 :doc:`与 {IDF_TARGET_NAME} 创建串口连接 <../get-started/establish-serial-connection>`
配置
-----

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@@ -150,6 +150,9 @@ UART 驱动程序函数通过 :cpp:type:`uart_port_t` 识别不同的 UART 控
// Set UART pins(TX: IO4, RX: IO5, RTS: IO18, CTS: IO19, DTR: UNUSED, DSR: UNUSED)
ESP_ERROR_CHECK(uart_set_pin({IDF_TARGET_UART_EXAMPLE_PORT}, 4, 5, 18, 19, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
.. note::
上方管脚编号仅为示例。许多开发板的板载 USB 至 UART 桥接到 UART0 的默认 TX/RX 管脚。若需要通过其他端口或其他管脚与 PC 通信,则需在这些管脚上另接 USB 至 UART 桥。
.. _uart-api-running-uart-communication:

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@@ -20,6 +20,8 @@
{IDF_TARGET_NAME} 支持 USB 外设。无需 USB 至 UART 桥,便可直接烧录设备。
USB 外设及其 USB PHY 与 UART 控制器彼此独立。UART 控制器在 GPIO 上输出 UART 信号,因此若要通过 USB 将 UART 连接到 PC仍需使用板载或外部的 USB 至 UART 桥。
.. blockdiag::
:scale: 70%
:caption: 支持 USB 的 SoC