diff --git a/components/esp_system/include/esp_system.h b/components/esp_system/include/esp_system.h index 73b8deec08c..c1c90362e45 100644 --- a/components/esp_system/include/esp_system.h +++ b/components/esp_system/include/esp_system.h @@ -37,7 +37,7 @@ typedef enum { ESP_RST_JTAG, //!< Reset by JTAG ESP_RST_EFUSE, //!< Reset due to efuse error ESP_RST_PWR_GLITCH, //!< Reset due to power glitch detected - ESP_RST_CPU_LOCKUP, //!< Reset due to CPU lock up + ESP_RST_CPU_LOCKUP, //!< Reset due to CPU lock up (double exception) } esp_reset_reason_t; /** diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 9ff125a6690..e60d7f085d1 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -387,6 +387,10 @@ config SOC_CPU_PMP_REGION_GRANULARITY int default 128 +config SOC_CPU_HAS_LOCKUP_RESET + bool + default y + config SOC_DS_SIGNATURE_MAX_BIT_LEN int default 3072 diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index a772b74cd82..545b197b29b 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -164,6 +164,8 @@ #define SOC_CPU_IDRAM_SPLIT_USING_PMP 1 #define SOC_CPU_PMP_REGION_GRANULARITY 128 +#define SOC_CPU_HAS_LOCKUP_RESET 1 + /*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/ /** The maximum length of a Digital Signature in bits. */ #define SOC_DS_SIGNATURE_MAX_BIT_LEN (3072) diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index c57abf756fa..2676e0a60a8 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -195,6 +195,10 @@ config SOC_CPU_PMP_REGION_GRANULARITY int default 128 +config SOC_CPU_HAS_LOCKUP_RESET + bool + default y + config SOC_DMA_CAN_ACCESS_FLASH bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 8525e5b7cca..ee5eac2dc68 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -143,6 +143,8 @@ #define SOC_CPU_IDRAM_SPLIT_USING_PMP 1 #define SOC_CPU_PMP_REGION_GRANULARITY 128 // TODO IDF-9580 check when doing PMP bringup +#define SOC_CPU_HAS_LOCKUP_RESET 1 + /*-------------------------- DMA Common CAPS ----------------------------------------*/ #define SOC_DMA_CAN_ACCESS_FLASH 1 /*!< DMA can access Flash memory */ diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in index c6417181c65..b4da97571eb 100644 --- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in @@ -511,6 +511,10 @@ config SOC_CPU_PMP_REGION_GRANULARITY int default 128 +config SOC_CPU_HAS_LOCKUP_RESET + bool + default y + config SOC_DS_SIGNATURE_MAX_BIT_LEN int default 4096 diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index 486e64d92b7..0cece4f2b3d 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -186,6 +186,8 @@ #define SOC_CPU_IDRAM_SPLIT_USING_PMP 1 #define SOC_CPU_PMP_REGION_GRANULARITY 128 +#define SOC_CPU_HAS_LOCKUP_RESET 1 + /*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/ /** The maximum length of a Digital Signature in bits. */ #define SOC_DS_SIGNATURE_MAX_BIT_LEN (4096) diff --git a/docs/en/api-guides/fatal-errors.rst b/docs/en/api-guides/fatal-errors.rst index 5cfd99c3004..d75d484f03e 100644 --- a/docs/en/api-guides/fatal-errors.rst +++ b/docs/en/api-guides/fatal-errors.rst @@ -530,6 +530,16 @@ The backtrace should point to the function where stack smashing has occurred. Ch .. |CACHE_ERR_MSG| replace:: Cache error .. |STACK_OVERFLOW| replace:: Stack overflow + +.. only:: SOC_CPU_HAS_LOCKUP_RESET + + CPU Lockup + ^^^^^^^^^^ + A CPU lockup reset happens when there is a double exception, i.e. when an exception occurs while the CPU is already in an exception handler. The most common cause for this is when the cache is in such a state that accessing external memory not possible. If this is the case then the panic handler will crash as well due to being unable to fetch instructions or read data. + + If this is the case you can try placing the panic handler code in IRAM, which can be accessed when cache is disabled, to get more information about the cause of the lockup. This can be done with :ref:`CONFIG_ESP_PANIC_HANDLER_IRAM`. + + Undefined Behavior Sanitizer (UBSAN) Checks ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^