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fix(ulp_riscv_i2c): Fix spurious pass in RTC I2C multi-device test

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The test was passing without real I2C communication due to a GPIO
mismatch (slave on GPIO 6/7 vs RTC I2C master on GPIO 2/3), single-byte
zero-coincidence, unchecked ULP return values, and an insufficient
RTC I2C timeout.

Fix slave GPIOs, increase test length, check I2C return values, add
proper assertions, and set an adequate RTC I2C timeout.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
Sudeep Mohanty
2026-05-15 15:24:43 +02:00
co-authored by Cursor
parent 698354f90e
commit babd3e3ac8
4 changed files with 26 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/ulp/test_apps/ulp_riscv/main/test_ulp_riscv_i2c.c
+16 -3
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -28,8 +28,8 @@ static void load_and_start_ulp_riscv_firmware(const uint8_t* ulp_bin, size_t ulp
TEST_ASSERT(ulp_riscv_run() == ESP_OK);
}
#define I2C_SLAVE_SCL_IO 7 /*!<I2C gpio number for SCL */
#define I2C_SLAVE_SDA_IO 6 /*!<I2C gpio number for SDA */
#define I2C_SLAVE_SCL_IO 2 /*!<I2C gpio number for SCL, must match RTC I2C master */
#define I2C_SLAVE_SDA_IO 3 /*!<I2C gpio number for SDA, must match RTC I2C master */
#define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
#define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
#define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
@@ -81,6 +81,9 @@ static void i2c_master_write_read_test(void)
while (ulp_read_test_reply == RISCV_COMMAND_INVALID) {
}
/* Verify that the ULP I2C read succeeded */
TEST_ASSERT_EQUAL(RISCV_COMMAND_OK, ulp_read_test_reply & 0xFFFF);
/* Verify the test data read by the DUT */
uint8_t *read_data = (uint8_t*)&ulp_data_rd;
ESP_LOGI(TAG, "Master read data:");
@@ -152,10 +155,20 @@ static void i2c_slave_read_write_test(void)
/* Wait for DUT to write test data before reading it */
unity_wait_for_signal("slave read");
/*
* The RTC I2C master sends a sub-register address byte before each transaction.
* The slave's RX buffer now contains:
* [sub_reg_addr (read phase)] [sub_reg_addr (write phase)] [data_wr[0..N-1]]
* Drain the two stale sub-register address bytes before reading actual data.
*/
uint8_t sub_reg_discard[2];
i2c_slave_read_buffer(I2C_SLAVE_NUM, sub_reg_discard, sizeof(sub_reg_discard), 2000 / portTICK_PERIOD_MS);
/* Verify the test data written by the DUT */
size_rd = i2c_slave_read_buffer(I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 10000 / portTICK_PERIOD_MS);
ESP_LOGI(TAG, "Slave read data:");
ESP_LOG_BUFFER_HEX(TAG, data_rd, size_rd);
TEST_ASSERT_EQUAL_INT(RW_TEST_LENGTH, size_rd);
TEST_ASSERT_EQUAL_HEX8_ARRAY(expected_master_write_data, data_rd, RW_TEST_LENGTH);
/* Clean up */
components/ulp/test_apps/ulp_riscv/main/ulp/test_main_i2c.c
+5 -5
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@@ -1,14 +1,14 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "ulp_test_shared.h"
// #include "ulp_riscv.h"
#include "ulp_riscv_utils.h"
#include "ulp_riscv_i2c_ulp_core.h"
#include "esp_err.h"
volatile riscv_test_command_reply_t read_test_reply = RISCV_COMMAND_INVALID;
volatile riscv_test_command_reply_t write_test_cmd = RISCV_COMMAND_INVALID;
@@ -22,10 +22,10 @@ int main(void)
ulp_riscv_i2c_master_set_slave_addr(I2C_SLAVE_ADDRESS);
/* Read from the I2C slave device */
ulp_riscv_i2c_master_read_from_device(data_rd, RW_TEST_LENGTH);
esp_err_t ret = ulp_riscv_i2c_master_read_from_device(data_rd, RW_TEST_LENGTH);
/* Signal the main CPU once read is done */
read_test_reply = RISCV_COMMAND_OK;
/* Signal the main CPU with actual result */
read_test_reply = (ret == ESP_OK) ? RISCV_COMMAND_OK : RISCV_COMMAND_NOK;
/* Wait for write command from main CPU */
while (write_test_cmd != RISCV_COMMAND_OK) {
components/ulp/test_apps/ulp_riscv/main/ulp/ulp_test_shared.h
+1 -2
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@@ -11,8 +11,7 @@
/* I2C test params */
#define I2C_SLAVE_ADDRESS 0x28
#define DATA_LENGTH 200
// TODO: Updated the test to perform multi-byte read/write (IDFGH-11056)
#define RW_TEST_LENGTH 1 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
#define RW_TEST_LENGTH 7 /*!<Data length for r/w test, prime and not divisible by any I2C FIFO size */
typedef enum {
RISCV_READ_WRITE_TEST = 1,
components/ulp/test_apps/ulp_riscv/sdkconfig.defaults
+4
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@@ -3,3 +3,7 @@ CONFIG_ESP_TASK_WDT_EN=n
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_TYPE_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
# RTC I2C timeout: default 500 cycles is too short for real I2C transactions.
# At 17.5 MHz ULP clock, the first RX_DATA interrupt arrives after ~1140 cycles.
CONFIG_ULP_RISCV_I2C_RW_TIMEOUT=5000