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Merge branch 'backport/h264_regdma_retention_v6.0' into 'release/v6.0'
feat(esp32p4): add H264 REGDMA link and sleep retention module See merge request espressif/esp-idf!48375
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@@ -1943,6 +1943,10 @@ config SOC_JPEG_ENCODE_SUPPORTED
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bool
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default y
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config SOC_H264_ENCODER_SUPPORTED
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bool
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default y
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config SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV
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bool
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default y
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@@ -63,6 +63,7 @@ typedef enum periph_retention_module {
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SLEEP_RETENTION_MODULE_EMAC = 37,
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SLEEP_RETENTION_MODULE_JPEG = 38,
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SLEEP_RETENTION_MODULE_LCDCAM = 39,
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SLEEP_RETENTION_MODULE_H264 = 40,
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SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
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} periph_retention_module_t;
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@@ -107,6 +108,7 @@ typedef enum periph_retention_module {
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: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_LCDCAM) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_JPEG) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_H264) ? true \
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: false)
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#ifdef __cplusplus
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@@ -746,6 +746,9 @@
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#define SOC_JPEG_DECODE_SUPPORTED (1)
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#define SOC_JPEG_ENCODE_SUPPORTED (1)
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/*--------------------------- H264 --------------------------------*/
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#define SOC_H264_ENCODER_SUPPORTED (1)
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/*--------------------------- CAM ---------------------------------*/
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#define SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV (1)
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@@ -68,6 +68,7 @@ extern "C" {
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#define REGDMA_EMAC_LINK(_pri) ((0x27 << 8) | _pri)
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#define REGDMA_JPEG_LINK(_pri) ((0x28 << 8) | _pri)
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#define REGDMA_LCDCAM_LINK(_pri) ((0x29 << 8) | _pri)
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#define REGDMA_H264_LINK(_pri) ((0x2a << 8) | _pri)
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#define REGDMA_MODEM_FE_LINK(_pri) ((0xFF << 8) | _pri)
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@@ -98,6 +99,7 @@ extern "C" {
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#define REGDMA_LINK_PRI_EMAC REGDMA_LINK_PRI_GENERAL_PERIPH
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#define REGDMA_LINK_PRI_LCDCAM REGDMA_LINK_PRI_GENERAL_PERIPH
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#define REGDMA_LINK_PRI_JPEG REGDMA_LINK_PRI_GENERAL_PERIPH
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#define REGDMA_LINK_PRI_H264 REGDMA_LINK_PRI_GENERAL_PERIPH
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typedef enum {
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REGDMA_LINK_PRI_0 = 0,
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