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feat(esp_driver_gpio): support rtc_io edge wakeup deepsleep
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -335,6 +335,16 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_GPIO.pinn[rtcio_num].pinn_int_type = 0;
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}
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/**
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* Clear edge-wakeup latch.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_clear_edge_wakeup_latch(int rtcio_num)
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{
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LP_GPIO.pinn[rtcio_num].pinn_edge_wakeup_clr = 1;
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}
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/**
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* Enable interrupt function and set interrupt type
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*
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@@ -341,6 +341,16 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_IO.pin[rtcio_num].int_type = 0;
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}
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/**
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* Clear edge-wakeup latch.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_clear_edge_wakeup_latch(int rtcio_num)
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{
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LP_IO.pin[rtcio_num].edge_wakeup_clr = 1;
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}
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/**
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* Enable interrupt function and set interrupt type
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*
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@@ -334,6 +334,16 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_GPIO.pinn[rtcio_num].pinn_int_type = 0;
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}
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/**
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* Clear edge-wakeup latch.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_clear_edge_wakeup_latch(int rtcio_num)
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{
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LP_GPIO.pinn[rtcio_num].pinn_edge_wakeup_clr = 1;
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}
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/**
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* @brief Enable interrupt function and set interrupt type
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*
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@@ -334,6 +334,16 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_GPIO.pinn[rtcio_num].pinn_int_type = 0;
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}
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/**
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* Clear edge-wakeup latch.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_clear_edge_wakeup_latch(int rtcio_num)
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{
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LP_GPIO.pinn[rtcio_num].pinn_edge_wakeup_clr = 1;
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}
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/**
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* @brief Enable interrupt function and set interrupt type
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*
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@@ -404,6 +404,16 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_GPIO.pin[rtcio_num].int_type = 0;
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}
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/**
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* Clear edge-wakeup latch.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_clear_edge_wakeup_latch(int rtcio_num)
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{
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LP_GPIO.pin[rtcio_num].edge_wakeup_clr = 1;
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}
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/**
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* Enable interrupt function and set interrupt type
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*
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@@ -333,6 +333,16 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_GPIO.pinn[rtcio_num].pinn_int_type = 0;
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}
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/**
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* Clear edge-wakeup latch.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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*/
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static inline void rtcio_ll_clear_edge_wakeup_latch(int rtcio_num)
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{
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LP_GPIO.pinn[rtcio_num].pinn_edge_wakeup_clr = 1;
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}
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/**
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* @brief Enable interrupt function and set interrupt type
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*
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@@ -320,6 +320,20 @@ void rtcio_hal_isolate(int rtcio_num);
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#define rtc_hal_gpio_get_wakeup_status() rtcio_hal_get_interrupt_status()
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#define rtc_hal_gpio_clear_wakeup_status() rtcio_hal_clear_interrupt_status()
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#if SOC_RTC_GPIO_EDGE_WAKEUP_SUPPORTED
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/**
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* @brief Clear the latched edge-wakeup state for a GPIO that is enabled for
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* peripheral-powerdown-sleep wakeup in edge mode.
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*
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* Must be called before entering sleep on every pin configured for posedge/negedge/anyedge
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* wakeup, otherwise a stale latched edge would immediately wake the chip.
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*
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* @param hal Context of the HAL layer (unused, kept for API symmetry).
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* @param gpio_num GPIO number.
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*/
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#define gpio_hal_clear_hp_periph_pd_sleep_edge_wakeup_latch(hal, gpio_num) rtcio_ll_clear_edge_wakeup_latch(rtc_io_num_map[gpio_num])
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#endif //SOC_RTC_GPIO_EDGE_WAKEUP_SUPPORTED
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/**
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* @brief Get the status of whether an IO is used for sleep wake-up.
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*
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