mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-03 03:31:41 +03:00
refactor(i2c): cleanup I2C definitions in soc_caps.h
This commit is contained in:
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -189,7 +189,7 @@ typedef struct {
|
||||
int cmd_idx; /*!< record current command index, for master mode */
|
||||
int status; /*!< record current command status, for master mode */
|
||||
int rx_cnt; /*!< record current read index, for master mode */
|
||||
uint8_t data_buf[SOC_I2C_FIFO_LEN ]; /*!< a buffer to store i2c fifo data */
|
||||
uint8_t data_buf[I2C_LL_GET(FIFO_LEN)]; /*!< a buffer to store i2c fifo data */
|
||||
|
||||
i2c_cmd_desc_t cmd_link; /*!< I2C command link */
|
||||
QueueHandle_t cmd_evt_queue; /*!< I2C command event queue */
|
||||
@@ -214,7 +214,7 @@ typedef struct {
|
||||
i2c_hal_context_t hal; /*!< I2C hal context */
|
||||
portMUX_TYPE spinlock;
|
||||
bool hw_enabled;
|
||||
#if !SOC_I2C_SUPPORT_HW_CLR_BUS
|
||||
#if !I2C_LL_SUPPORT_HW_CLR_BUS
|
||||
int scl_io_num;
|
||||
int sda_io_num;
|
||||
#endif
|
||||
@@ -672,7 +672,7 @@ esp_err_t i2c_get_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t *tx_trans_mode,
|
||||
static esp_err_t i2c_master_clear_bus(i2c_port_t i2c_num)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
#if !SOC_I2C_SUPPORT_HW_CLR_BUS
|
||||
#if !I2C_LL_SUPPORT_HW_CLR_BUS
|
||||
const int scl_half_period = I2C_CLR_BUS_HALF_PERIOD_US; // use standard 100kHz data rate
|
||||
int i = 0;
|
||||
int scl_io = i2c_context[i2c_num].scl_io_num;
|
||||
@@ -726,7 +726,7 @@ static esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num)
|
||||
{
|
||||
// A workaround for avoiding cause timeout issue when using
|
||||
// hardware reset.
|
||||
#if !SOC_I2C_SUPPORT_HW_FSM_RST
|
||||
#if !I2C_LL_SUPPORT_HW_FSM_RST
|
||||
i2c_hal_timing_config_t timing_config;
|
||||
uint8_t filter_cfg;
|
||||
|
||||
@@ -1046,7 +1046,7 @@ esp_err_t i2c_set_pin(i2c_port_t i2c_num, gpio_num_t sda_io_num, gpio_num_t scl_
|
||||
gpio_set_pull_mode(scl_io_num, GPIO_FLOATING);
|
||||
}
|
||||
}
|
||||
#if !SOC_I2C_SUPPORT_HW_CLR_BUS
|
||||
#if !I2C_LL_SUPPORT_HW_CLR_BUS
|
||||
i2c_context[i2c_num].scl_io_num = scl_io_num;
|
||||
i2c_context[i2c_num].sda_io_num = sda_io_num;
|
||||
#endif
|
||||
@@ -1484,7 +1484,7 @@ static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t
|
||||
|
||||
//TODO: to reduce interrupt number
|
||||
if (!i2c_cmd_is_single_byte(cmd)) {
|
||||
fifo_fill = MIN(remaining_bytes, SOC_I2C_FIFO_LEN);
|
||||
fifo_fill = MIN(remaining_bytes, I2C_LL_FIFO_LEN);
|
||||
/* cmd->data shall not be altered!
|
||||
* Else it would not be possible to reuse the commands list. */
|
||||
write_pr = cmd->data + cmd->bytes_used;
|
||||
@@ -1514,7 +1514,7 @@ static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t
|
||||
break;
|
||||
} else if (cmd->hw_cmd.op_code == I2C_LL_CMD_READ) {
|
||||
//TODO: to reduce interrupt number
|
||||
fifo_fill = MIN(remaining_bytes, SOC_I2C_FIFO_LEN);
|
||||
fifo_fill = MIN(remaining_bytes, I2C_LL_FIFO_LEN);
|
||||
p_i2c->rx_cnt = fifo_fill;
|
||||
hw_cmd.byte_num = fifo_fill;
|
||||
i2c_ll_master_write_cmd_reg(i2c_context[i2c_num].hal.dev, hw_cmd, p_i2c->cmd_idx);
|
||||
@@ -1527,7 +1527,7 @@ static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t
|
||||
}
|
||||
p_i2c->cmd_idx++;
|
||||
p_i2c->cmd_link.head = p_i2c->cmd_link.head->next;
|
||||
if (p_i2c->cmd_link.head == NULL || p_i2c->cmd_idx >= (SOC_I2C_CMD_REG_NUM - 1)) {
|
||||
if (p_i2c->cmd_link.head == NULL || p_i2c->cmd_idx >= (I2C_LL_GET(CMD_REG_NUM) - 1)) {
|
||||
p_i2c->cmd_idx = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user