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feat(esp_hw_support): support GPIO wakeup deepsleep on esp32/esp32s2/esp32s3

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and expand gpio_wakeup_mask/gpio_trigger_mode to 64bit
This commit is contained in:
wuzhenghui
2026-03-25 10:49:47 +08:00
parent a441be19a7
commit b6fcdb1f48
27 changed files with 183 additions and 60 deletions
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components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
+8
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@@ -431,6 +431,14 @@ config SOC_RTC_CNTL_NEEDS_ATOMIC_ACCESS
bool
default y
config SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP
bool
default y
config SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_MASK
int
default 0
config SOC_DEDIC_GPIO_HAS_INTERRUPT
bool
default y
components/soc/esp32s2/include/soc/soc_caps.h
+5
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@@ -203,6 +203,11 @@
* (e.g., spinlocks) when accessed from multiple cores or threads. */
#define SOC_RTC_CNTL_NEEDS_ATOMIC_ACCESS 1
// GPIO0~21 on ESP32-S2 can support chip deep sleep wakeup
#define SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP (1)
#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP SOC_GPIO_SUPPORT_HP_PERIPH_PD_SLEEP_WAKEUP
#define SOC_GPIO_HP_PERIPH_PD_SLEEP_WAKEABLE_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 | BIT8 | BIT9 | BIT10 | BIT11 | BIT12 | BIT13 | BIT14 | BIT15 | BIT16 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21)
/*-------------------------- Dedicated GPIO CAPS ---------------------------------------*/
#define SOC_DEDIC_GPIO_HAS_INTERRUPT (1) /*!< Dedicated GPIO has its own interrupt source */