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https://github.com/espressif/esp-idf.git
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feat(esp_hw_support): support GPIO wakeup deepsleep on esp32/esp32s2/esp32s3
and expand gpio_wakeup_mask/gpio_trigger_mode to 64bit
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -330,6 +330,17 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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RTCIO.pin[rtcio_num].int_type = 0;
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}
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/**
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* Enable interrupt function and set interrupt type for RTC IO.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @param type Interrupt type (disable, edge, or level). Matches gpio_int_type_t encoding.
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*/
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static inline void rtcio_ll_intr_enable(int rtcio_num, gpio_int_type_t type)
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{
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RTCIO.pin[rtcio_num].int_type = type;
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}
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/**
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* Enable rtc io output in deep sleep.
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*
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@@ -407,6 +418,36 @@ static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
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SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1, level, RTC_CNTL_EXT_WAKEUP0_LV_S);
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}
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/**
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* @brief Get the status of whether an IO is used for sleep wake-up.
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @return True if the pin is enabled to wake up from deep-sleep
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*/
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static inline bool rtcio_ll_wakeup_is_enabled(int rtcio_num)
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{
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HAL_ASSERT(rtcio_num >= 0 && rtcio_num < SOC_RTCIO_PIN_COUNT && "io does not support deep sleep wake-up function");
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return RTCIO.pin[rtcio_num].wakeup_enable;
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}
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/**
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* @brief Get the rtc io interrupt status
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*
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* @return bit 0~17 corresponding to 0 ~ SOC_RTCIO_PIN_COUNT.
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*/
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static inline uint32_t rtcio_ll_get_interrupt_status(void)
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{
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return RTCIO.status.status;
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}
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/**
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* @brief Clear all LP IO pads status
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*/
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static inline void rtcio_ll_clear_interrupt_status(void)
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{
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RTCIO.status_w1tc.w1tc = 0x3FFFF; // Clear all 18 RTCIO pins
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}
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#ifdef __cplusplus
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}
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#endif
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