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feat(ble): supported ble light sleep feat on esp32s31

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This commit is contained in:
cjin
2026-05-11 08:34:15 +08:00
committed by BOT
parent 9bbb6446b8
commit b6643c4786
15 changed files with 79 additions and 77 deletions
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examples/bluetooth/nimble/power_save/main/Kconfig.projbuild
+7 -1
View File
@@ -2,10 +2,12 @@ menu "Example Configuration"
choice EXAMPLE_MAX_CPU_FREQ
prompt "Maximum CPU frequency"
default EXAMPLE_MAX_CPU_FREQ_160 if !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C5
default EXAMPLE_MAX_CPU_FREQ_160 if !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && \
!IDF_TARGET_ESP32C5 && !IDF_TARGET_ESP32S31
default EXAMPLE_MAX_CPU_FREQ_96 if IDF_TARGET_ESP32H2
default EXAMPLE_MAX_CPU_FREQ_120 if IDF_TARGET_ESP32C2
default EXAMPLE_MAX_CPU_FREQ_240 if IDF_TARGET_ESP32C5
default EXAMPLE_MAX_CPU_FREQ_320 if IDF_TARGET_ESP32S31
depends on PM_ENABLE
help
Maximum CPU frequency to use for dynamic frequency scaling.
@@ -23,6 +25,9 @@ menu "Example Configuration"
config EXAMPLE_MAX_CPU_FREQ_240
bool "240 MHz"
depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C5
config EXAMPLE_MAX_CPU_FREQ_320
bool "320 MHz"
depends on IDF_TARGET_ESP32S31
endchoice
config EXAMPLE_MAX_CPU_FREQ_MHZ
@@ -32,6 +37,7 @@ menu "Example Configuration"
default 120 if EXAMPLE_MAX_CPU_FREQ_120
default 160 if EXAMPLE_MAX_CPU_FREQ_160
default 240 if EXAMPLE_MAX_CPU_FREQ_240
default 320 if EXAMPLE_MAX_CPU_FREQ_320
choice EXAMPLE_MIN_CPU_FREQ
prompt "Minimum CPU frequency"
examples/bluetooth/nimble/power_save/main/main.c
+2 -28
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -17,32 +17,6 @@
#include "services/gap/ble_svc_gap.h"
#include "bleprph.h"
#if CONFIG_EXAMPLE_USE_CI_ADDRESS
#ifdef CONFIG_IDF_TARGET_ESP32
#define TEST_CI_ADDRESS_CHIP_OFFSET (0)
#elif CONFIG_IDF_TARGET_ESP32C2
#define TEST_CI_ADDRESS_CHIP_OFFSET (1)
#elif CONFIG_IDF_TARGET_ESP32C3
#define TEST_CI_ADDRESS_CHIP_OFFSET (2)
#elif CONFIG_IDF_TARGET_ESP32C6
#define TEST_CI_ADDRESS_CHIP_OFFSET (3)
#elif CONFIG_IDF_TARGET_ESP32C5
#define TEST_CI_ADDRESS_CHIP_OFFSET (4)
#elif CONFIG_IDF_TARGET_ESP32H2
#define TEST_CI_ADDRESS_CHIP_OFFSET (5)
#elif CONFIG_IDF_TARGET_ESP32P4
#define TEST_CI_ADDRESS_CHIP_OFFSET (6)
#elif CONFIG_IDF_TARGET_ESP32S3
#define TEST_CI_ADDRESS_CHIP_OFFSET (7)
#elif CONFIG_IDF_TARGET_ESP32C61
#define TEST_CI_ADDRESS_CHIP_OFFSET (8)
#elif CONFIG_IDF_TARGET_ESP32H4
#define TEST_CI_ADDRESS_CHIP_OFFSET (9)
#elif CONFIG_IDF_TARGET_ESP32S31
#define TEST_CI_ADDRESS_CHIP_OFFSET (10)
#endif
#endif
#if CONFIG_EXAMPLE_EXTENDED_ADV
static uint8_t ext_adv_pattern_1[] = {
0x02, BLE_HS_ADV_TYPE_FLAGS, 0x06,
@@ -535,7 +509,7 @@ bleprph_on_sync(void)
uint32_t *offset = (uint32_t *)&addr[1];
*offset = atoi(CONFIG_EXAMPLE_CI_ADDRESS_OFFSET);
addr[5] = 0xC3;
addr[0] = TEST_CI_ADDRESS_CHIP_OFFSET;
addr[0] = CONFIG_IDF_FIRMWARE_CHIP_ID;
rc = ble_hs_id_set_rnd(addr);
assert(rc == 0);
}