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Merge branch 'feat/h4_introduce_step6_esp_system' into 'master'
feat(esp32h4): support esp_system, esp_timer and freertos (stage6) Closes IDF-12565 See merge request espressif/esp-idf!37269
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -7,7 +7,9 @@
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#pragma once
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#include "soc/soc.h"
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#include "soc/soc_caps.h"
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#include "soc/system_reg.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/assist_debug_reg.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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@@ -63,6 +65,35 @@ FORCE_INLINE_ATTR void cpu_utility_ll_unstall_cpu(uint32_t cpu_no)
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int rtc_cntl_c1 = (cpu_no == 0) ? RTC_CNTL_SW_STALL_PROCPU_C1_M : RTC_CNTL_SW_STALL_APPCPU_C1_M;
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CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, rtc_cntl_c1);
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}
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FORCE_INLINE_ATTR void cpu_utility_ll_enable_debug(uint32_t cpu_no)
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{
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if (cpu_no == 0) {
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REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_PDEBUGENABLE_REG, 1);
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} else {
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REG_WRITE(ASSIST_DEBUG_CORE_1_RCD_PDEBUGENABLE_REG, 1);
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}
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}
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FORCE_INLINE_ATTR void cpu_utility_ll_enable_record(uint32_t cpu_no)
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{
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if (cpu_no == 0) {
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REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_RECORDING_REG, 1);
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} else {
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REG_WRITE(ASSIST_DEBUG_CORE_1_RCD_RECORDING_REG, 1);
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}
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}
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FORCE_INLINE_ATTR void cpu_utility_ll_enable_clock_and_reset_app_cpu(void)
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{
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if (!REG_GET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_CLKGATE_EN)) {
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REG_SET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_CLKGATE_EN);
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REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RUNSTALL);
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REG_SET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETING);
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REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETING);
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}
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}
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#endif // SOC_CPU_CORES_NUM > 1
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#ifdef __cplusplus
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