mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-02 03:00:34 +03:00
change(ulp): add lp periph intr enable apis
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@@ -14,6 +14,7 @@ extern "C" {
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#include <stdbool.h>
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#include <stdbool.h>
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#include "hal/i2c_types.h"
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#include "hal/i2c_types.h"
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#include "esp_err.h"
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#include "esp_err.h"
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#include "hal/i2c_ll.h"
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/**
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/**
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* @brief Read from I2C device
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* @brief Read from I2C device
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@@ -99,6 +100,34 @@ esp_err_t lp_core_i2c_master_write_read_device(i2c_port_t lp_i2c_num, uint16_t d
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*/
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*/
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void lp_core_i2c_master_set_ack_check_en(i2c_port_t lp_i2c_num, bool ack_check_en);
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void lp_core_i2c_master_set_ack_check_en(i2c_port_t lp_i2c_num, bool ack_check_en);
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#if SOC_LP_I2C_SUPPORTED
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/**
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* @brief Enable LP I2C master-related interrupts at the peripheral
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*
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* Enables the same interrupt sources used by the LP I2C master driver (see I2C_LL_MASTER_EVENT_INTR).
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*
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* @param lp_i2c_num Must be the LP I2C port (e.g. LP_I2C_NUM_0), not an HP I2C port.
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* @param mask Interrupt mask needs to be enabled
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*/
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static inline void ulp_lp_core_lp_i2c_intr_enable(i2c_port_t lp_i2c_num, uint32_t mask)
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{
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HAL_ASSERT(lp_i2c_num == LP_I2C_NUM_0);
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i2c_ll_enable_intr_mask(I2C_LL_GET_HW(lp_i2c_num), mask);
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}
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/**
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* @brief Disable LP I2C master-related interrupts at the peripheral
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*
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* @param lp_i2c_num Must be the LP I2C port (e.g. LP_I2C_NUM_0), not an HP I2C port.
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* @param mask Interrupt mask needs to be disabled
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*/
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static inline void ulp_lp_core_lp_i2c_intr_disable(i2c_port_t lp_i2c_num, uint32_t mask)
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{
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HAL_ASSERT(lp_i2c_num == LP_I2C_NUM_0);
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i2c_ll_disable_intr_mask(I2C_LL_GET_HW(lp_i2c_num), mask);
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}
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#endif /* SOC_LP_I2C_SUPPORTED */
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@@ -13,6 +13,31 @@ extern "C" {
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#include <stdint.h>
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#include <stdint.h>
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#include "esp_err.h"
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#include "esp_err.h"
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#include "hal/uart_types.h"
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#include "hal/uart_types.h"
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#include "hal/uart_ll.h"
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#if SOC_LP_UART_SUPPORTED
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/**
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* @brief LP UART peripheral interrupt enable
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* @param uart_num UART port number
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* @param mask Interrupt mask needs to be enabled
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*/
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static inline void ulp_lp_core_lp_uart_intr_enable(uart_port_t uart_num, uint32_t mask)
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{
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HAL_ASSERT(uart_num == LP_UART_NUM_0);
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uart_ll_ena_intr_mask(UART_LL_GET_HW(uart_num), mask);
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}
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/**
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* @brief LP UART peripheral interrupt disable
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* @param uart_num UART port number
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* @param mask Interrupt mask needs to be disabled
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*/
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static inline void ulp_lp_core_lp_uart_intr_disable(uart_port_t uart_num, uint32_t mask)
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{
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HAL_ASSERT(uart_num == LP_UART_NUM_0);
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uart_ll_disable_intr_mask(UART_LL_GET_HW(uart_num), mask);
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}
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#endif /* SOC_LP_UART_SUPPORTED */
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/**
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/**
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* @brief Send data to the LP UART port if there is space available in the Tx FIFO
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* @brief Send data to the LP UART port if there is space available in the Tx FIFO
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@@ -1,11 +1,12 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#pragma once
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#pragma once
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@@ -14,6 +15,9 @@ extern "C" {
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#include "esp_err.h"
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#include "esp_err.h"
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#include "hal/adc_types.h"
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#include "hal/adc_types.h"
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#include "esp_adc/adc_oneshot.h"
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#include "esp_adc/adc_oneshot.h"
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#if SOC_LP_ADC_SUPPORTED
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#include "soc/lp_adc_struct.h"
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#endif
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/**
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/**
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* @brief LP ADC channel configurations
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* @brief LP ADC channel configurations
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@@ -108,6 +112,23 @@ esp_err_t lp_core_lp_adc_read_channel_raw(adc_unit_t unit_id, adc_channel_t chan
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*/
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*/
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esp_err_t lp_core_lp_adc_read_channel_converted(adc_unit_t unit_id, adc_channel_t channel, int *voltage_mv);
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esp_err_t lp_core_lp_adc_read_channel_converted(adc_unit_t unit_id, adc_channel_t channel, int *voltage_mv);
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#if SOC_LP_ADC_SUPPORTED
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/**
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* @brief Enable or disable the LP ADC conversion-done interrupt to the LP CPU (LP_ADC int_ena cocpu_saradc1/2_int_ena).
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*
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* @param unit_id ADC unit (ADC_UNIT_1 / ADC_UNIT_2)
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* @param enable true to enable, false to disable
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*/
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static inline void ulp_lp_core_lp_adc_intr_enable(adc_unit_t unit_id, bool enable)
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{
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if (unit_id == ADC_UNIT_1) {
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LP_ADC.int_ena.cocpu_saradc1_int_ena = enable;
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} else if (unit_id == ADC_UNIT_2) {
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LP_ADC.int_ena.cocpu_saradc2_int_ena = enable;
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}
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}
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#endif /* SOC_LP_ADC_SUPPORTED */
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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