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feat: enable cpu region protection for esp32s31

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This commit is contained in:
nilesh.kale
2026-08-17 19:23:58 +05:30
committed by Mahavir Jain
parent d60155a174
commit b5891edb9b
6 changed files with 371 additions and 38 deletions
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components/soc/esp32s31/include/soc/soc.h
+6 -3
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@@ -193,9 +193,12 @@
#define CPU_PERIPH_LOW 0x2C000000
#define CPU_PERIPH_HIGH 0x2C020000
// Region of address space that holds peripherals, HP APB peripherals
#define SOC_PERIPHERAL_LOW 0x50000000 //TODO need update
#define SOC_PERIPHERAL_HIGH 0x50100000 //TODO need update
// Region of address space that holds the on-chip peripherals (MODEM/HP/LP APB
// peripherals, security peripherals, CPU peripheral, cache-data memory and the
// debug address space). Per the S31 bus address map this spans from the start of
// the "On-Chip Peripherals" aperture up to the base of the LP TCM (SOC_RTC_IRAM_LOW).
#define SOC_PERIPHERAL_LOW 0x20000000
#define SOC_PERIPHERAL_HIGH 0x2E000000
/** LP subsystem from ``LP_SYS`` through ``LP_DAC``*/
#define SOC_LP_PERIPH_LOW DR_REG_LP_SYS_BASE