From b4cd651f0a1936634806a813747eca8f4c20a808 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Mon, 27 Jul 2026 12:31:17 +0800 Subject: [PATCH] feat(esp_system): support XTAL as RTC fast clock source --- components/esp_system/port/soc/esp32s31/clk.c | 9 +++++++++ components/ulp/test_apps/.build-test-rules.yml | 3 --- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/components/esp_system/port/soc/esp32s31/clk.c b/components/esp_system/port/soc/esp32s31/clk.c index 5655994b386..e1d578dcb59 100644 --- a/components/esp_system/port/soc/esp32s31/clk.c +++ b/components/esp_system/port/soc/esp32s31/clk.c @@ -56,7 +56,16 @@ __attribute__((weak)) void esp_clk_init(void) assert(rtc_clk_xtal_freq_get() == SOC_XTAL_FREQ_40M); rtc_clk_8m_enable(true); +#if CONFIG_RTC_FAST_CLK_SRC_RC_FAST rtc_clk_fast_src_set(SOC_RTC_FAST_CLK_SRC_RC_FAST); +#elif CONFIG_RTC_FAST_CLK_SRC_XTAL + rtc_clk_fast_src_set(SOC_RTC_FAST_CLK_SRC_XTAL); + if (esp_sleep_sub_mode_dump_config(NULL)[ESP_SLEEP_RTC_FAST_USE_XTAL_MODE] == 0) { + esp_sleep_sub_mode_config(ESP_SLEEP_RTC_FAST_USE_XTAL_MODE, true); + } +#else +#error "No RTC fast clock source configured" +#endif #if defined(CONFIG_BOOTLOADER_WDT_ENABLE) && SOC_RTC_WDT_SUPPORTED // WDT uses a SLOW_CLK clock source. After a function select_rtc_slow_clk a frequency of this source can changed. diff --git a/components/ulp/test_apps/.build-test-rules.yml b/components/ulp/test_apps/.build-test-rules.yml index f83aeacf71d..535924c7d76 100644 --- a/components/ulp/test_apps/.build-test-rules.yml +++ b/components/ulp/test_apps/.build-test-rules.yml @@ -4,9 +4,6 @@ components/ulp/test_apps/lp_core/lp_core_basic_tests: disable: - if: SOC_LP_CORE_SUPPORTED != 1 - if: CONFIG_NAME == "xtal" and SOC_CLK_LP_FAST_SUPPORT_XTAL != 1 - - if: IDF_TARGET in ["esp32s31"] and CONFIG_NAME == "xtal" - temporary: true - reason: CONFIG_RTC_FAST_CLK_SRC_XTAL not supported yet # TODO: [ESP32S31] IDF-15576 - if: CONFIG_NAME == "lp_vad" and SOC_LP_VAD_SUPPORTED != 1 depends_components: - ulp