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Merge branch 'refactor/use_gdma_link_in_rmt_v5.3' into 'release/v5.3'

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refactor(rmt): use gdma link list driver to mount buffer (v5.3)

See merge request espressif/esp-idf!41239
This commit is contained in:
morris
2025-08-21 13:06:26 +08:00
parent af2238a83c 161740f217
commit b4cbe6336c
20 changed files with 31 additions and 20 deletions
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components/esp_driver_rmt/include/driver/rmt_tx.h
+1
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@@ -44,6 +44,7 @@ typedef struct {
uint32_t with_dma: 1; /*!< If set, the driver will allocate an RMT channel with DMA capability */
uint32_t io_loop_back: 1; /*!< The signal output from the GPIO will be fed to the input path as well */
uint32_t io_od_mode: 1; /*!< Configure the GPIO as open-drain mode */
uint32_t init_level: 1; /*!< Set the initial level of the RMT channel signal */
} flags; /*!< TX channel config flags */
} rmt_tx_channel_config_t;
components/esp_driver_rmt/src/rmt_rx.c
+10
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@@ -571,6 +571,16 @@ static bool IRAM_ATTR rmt_isr_handle_rx_done(rmt_rx_channel_t *rx_chan)
rmt_ll_rx_enable(hal->regs, channel_id, false);
portEXIT_CRITICAL_ISR(&channel->spinlock);
#if !SOC_RMT_SUPPORT_ASYNC_STOP
// This is a workaround for ESP32.
// The RX engine can not be disabled once it is enabled in ESP32
// If the state isn't RMT_FSM_RUN, it means the RX engine was disabled
// and we shouldn't process the data.
if (atomic_load(&channel->fsm) != RMT_FSM_RUN) {
return false;
}
#endif
uint32_t offset = rmt_ll_rx_get_memory_writer_offset(hal->regs, channel_id);
// Start from C6, the actual pulse count is the number of input pulses N - 1.
components/esp_driver_rmt/src/rmt_tx.c
+3 -3
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@@ -325,7 +325,7 @@ esp_err_t rmt_new_tx_channel(const rmt_tx_channel_config_t *config, rmt_channel_
// disable carrier modulation by default, can re-enable by `rmt_apply_carrier()`
rmt_ll_tx_enable_carrier_modulation(hal->regs, channel_id, false);
// idle level is determined by register value
rmt_ll_tx_fix_idle_level(hal->regs, channel_id, 0, true);
rmt_ll_tx_fix_idle_level(hal->regs, channel_id, config->flags.init_level, true);
// always enable tx wrap, both DMA mode and ping-pong mode rely this feature
rmt_ll_tx_enable_wrap(hal->regs, channel_id, true);
@@ -808,14 +808,14 @@ static esp_err_t rmt_tx_disable(rmt_channel_handle_t channel)
// disable the hardware
portENTER_CRITICAL(&channel->spinlock);
rmt_ll_tx_enable_loop(hal->regs, channel->channel_id, false);
#if SOC_RMT_SUPPORT_TX_ASYNC_STOP
#if SOC_RMT_SUPPORT_ASYNC_STOP
rmt_ll_tx_stop(hal->regs, channel->channel_id);
#endif
portEXIT_CRITICAL(&channel->spinlock);
portENTER_CRITICAL(&group->spinlock);
rmt_ll_enable_interrupt(hal->regs, RMT_LL_EVENT_TX_MASK(channel_id), false);
#if !SOC_RMT_SUPPORT_TX_ASYNC_STOP
#if !SOC_RMT_SUPPORT_ASYNC_STOP
// we do a trick to stop the undergoing transmission
// stop interrupt, insert EOF marker to the RMT memory, polling the trans_done event
channel->hw_mem_base[0].val = 0;