diff --git a/components/esp_hal_clock/esp32h4/include/hal/clk_gate_ll.h b/components/esp_hal_clock/esp32h4/include/hal/clk_gate_ll.h index b232850ce0d..95c71c48ae7 100644 --- a/components/esp_hal_clock/esp32h4/include/hal/clk_gate_ll.h +++ b/components/esp_hal_clock/esp32h4/include/hal/clk_gate_ll.h @@ -204,7 +204,6 @@ static inline void periph_ll_clk_gate_set_default(soc_reset_reason_t rst_reason, if ((rst_reason == RESET_REASON_CHIP_POWER_ON) || (rst_reason == RESET_REASON_CHIP_BROWN_OUT) \ || (rst_reason == RESET_REASON_SYS_RTC_WDT) || (rst_reason == RESET_REASON_SYS_SUPER_WDT)) { LPPERI.clk_en.val = 0; - LPPERI.clk_en.lp_io_ck_en = 1; // TODO: PM-699 LPPERI.clk_en.efuse_ck_en = 1; // keep efuse clock enabled LP_CLKRST.lp_clk_po_en.val = 0; } diff --git a/components/esp_hal_pmu/esp32/include/hal/rtc_cntl_ll.h b/components/esp_hal_pmu/esp32/include/hal/rtc_cntl_ll.h index 4b82a571ac0..cf08763d159 100644 --- a/components/esp_hal_pmu/esp32/include/hal/rtc_cntl_ll.h +++ b/components/esp_hal_pmu/esp32/include/hal/rtc_cntl_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -85,6 +85,11 @@ FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_cause(void) return REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_CAUSE); } +FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_enable(void) +{ + return REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_ENA); +} + #ifdef __cplusplus } #endif diff --git a/components/esp_hal_pmu/esp32c2/include/hal/rtc_cntl_ll.h b/components/esp_hal_pmu/esp32c2/include/hal/rtc_cntl_ll.h index 7947ee3b8d5..0b0fc1d61da 100644 --- a/components/esp_hal_pmu/esp32c2/include/hal/rtc_cntl_ll.h +++ b/components/esp_hal_pmu/esp32c2/include/hal/rtc_cntl_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -61,6 +61,11 @@ FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_cause(void) return REG_GET_FIELD(RTC_CNTL_SLP_WAKEUP_CAUSE_REG, RTC_CNTL_WAKEUP_CAUSE); } +FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_enable(void) +{ + return REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_ENA); +} + #ifdef __cplusplus } #endif diff --git a/components/esp_hal_pmu/esp32c3/include/hal/rtc_cntl_ll.h b/components/esp_hal_pmu/esp32c3/include/hal/rtc_cntl_ll.h index 829f10280f3..136e2c9820a 100644 --- a/components/esp_hal_pmu/esp32c3/include/hal/rtc_cntl_ll.h +++ b/components/esp_hal_pmu/esp32c3/include/hal/rtc_cntl_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -67,6 +67,11 @@ FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_cause(void) return REG_GET_FIELD(RTC_CNTL_SLP_WAKEUP_CAUSE_REG, RTC_CNTL_WAKEUP_CAUSE); } +FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_enable(void) +{ + return REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_ENA); +} + #ifdef __cplusplus } #endif diff --git a/components/esp_hal_pmu/esp32c5/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32c5/include/hal/pmu_ll.h index 36af3b94080..b9524bbf82d 100644 --- a/components/esp_hal_pmu/esp32c5/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32c5/include/hal/pmu_ll.h @@ -529,6 +529,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_enable_sw_intr(pmu_dev_t *hw, bool enable) hw->hp_ext.int_ena.sw = enable; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hal_pmu/esp32c6/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32c6/include/hal/pmu_ll.h index 3f8ee6ac871..e9fd16bbd3b 100644 --- a/components/esp_hal_pmu/esp32c6/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32c6/include/hal/pmu_ll.h @@ -529,6 +529,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_enable_sw_intr(pmu_dev_t *hw, bool enable) hw->hp_ext.int_ena.sw = enable; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hal_pmu/esp32c61/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32c61/include/hal/pmu_ll.h index 2353926ad59..e678b4218dd 100644 --- a/components/esp_hal_pmu/esp32c61/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32c61/include/hal/pmu_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -519,6 +519,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_clear_reject_intr_status(pmu_dev_t *hw) hw->hp_ext.int_clr.reject = 1; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hal_pmu/esp32h2/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32h2/include/hal/pmu_ll.h index 1272e2fb24e..c649e1c0dac 100644 --- a/components/esp_hal_pmu/esp32h2/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32h2/include/hal/pmu_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -475,6 +475,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_clear_reject_intr_status(pmu_dev_t *hw) hw->hp_ext.int_clr.reject = 1; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h index bc4747517a9..e2b65687321 100644 --- a/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h @@ -600,6 +600,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_clear_reject_intr_status(pmu_dev_t *hw) hw->hp_ext.int_clr.soc_sleep_reject = 1; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h index 55526952c01..aa72e0b6579 100644 --- a/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h @@ -645,6 +645,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_clear_reject_intr_status(pmu_dev_t *hw) hw->hp_ext.int_clr.soc_sleep_reject = 1; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0.val; diff --git a/components/esp_hal_pmu/esp32p4/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32p4/include/hal/pmu_ll.h index e9cff5dcf04..960c3f6a157 100644 --- a/components/esp_hal_pmu/esp32p4/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32p4/include/hal/pmu_ll.h @@ -572,6 +572,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_clear_lp_cpu_exc_intr_status(pmu_dev_t *hw) hw->hp_ext.int_clr.lp_exception = 1; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2.val; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hal_pmu/esp32s2/include/hal/rtc_cntl_ll.h b/components/esp_hal_pmu/esp32s2/include/hal/rtc_cntl_ll.h index 81a32c93caf..25f1c9c9f9d 100644 --- a/components/esp_hal_pmu/esp32s2/include/hal/rtc_cntl_ll.h +++ b/components/esp_hal_pmu/esp32s2/include/hal/rtc_cntl_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -81,6 +81,11 @@ FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_cause(void) return REG_GET_FIELD(RTC_CNTL_SLP_WAKEUP_CAUSE_REG, RTC_CNTL_WAKEUP_CAUSE); } +FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_enable(void) +{ + return REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_ENA); +} + #ifdef __cplusplus } #endif diff --git a/components/esp_hal_pmu/esp32s3/include/hal/rtc_cntl_ll.h b/components/esp_hal_pmu/esp32s3/include/hal/rtc_cntl_ll.h index 9ef09f1869a..0ebc912284d 100644 --- a/components/esp_hal_pmu/esp32s3/include/hal/rtc_cntl_ll.h +++ b/components/esp_hal_pmu/esp32s3/include/hal/rtc_cntl_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -162,6 +162,11 @@ FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_cause(void) return REG_GET_FIELD(RTC_CNTL_SLP_WAKEUP_CAUSE_REG, RTC_CNTL_WAKEUP_CAUSE); } +FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_enable(void) +{ + return REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_ENA); +} + #ifdef __cplusplus } #endif diff --git a/components/esp_hal_pmu/esp32s31/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32s31/include/hal/pmu_ll.h index b120ba0815c..d76d5cf23de 100644 --- a/components/esp_hal_pmu/esp32s31/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32s31/include/hal/pmu_ll.h @@ -624,6 +624,11 @@ FORCE_INLINE_ATTR void pmu_ll_hp_enable_sw_intr(pmu_dev_t *hw, bool enable) hw->hp_ext.int_ena.sw = enable; } +FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_enable(pmu_dev_t *hw) +{ + return hw->wakeup.cntl2; +} + FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_wakeup_cause(pmu_dev_t *hw) { return hw->wakeup.status0; diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c index ecf5aa936c8..a82fc537010 100644 --- a/components/esp_hw_support/sleep_gpio.c +++ b/components/esp_hw_support/sleep_gpio.c @@ -27,6 +27,13 @@ #include "soc/uart_pins.h" #include "hal/rtc_hal.h" +#if SOC_PMU_SUPPORTED +#include "hal/pmu_ll.h" +#include "esp_private/esp_pmu.h" +#else +#include "soc/rtc.h" +#include "hal/rtc_cntl_ll.h" +#endif #include "esp_private/esp_gpio_reserve.h" #include "esp_private/gpio.h" @@ -37,6 +44,18 @@ ESP_LOG_ATTR_TAG(TAG, "sleep_gpio"); +#if SOC_PM_SUPPORT_EXT0_WAKEUP +#define _IO_WAKEUP_EXT0 RTC_EXT0_TRIG_EN +#else +#define _IO_WAKEUP_EXT0 0 +#endif +#if SOC_PM_SUPPORT_EXT1_WAKEUP +#define _IO_WAKEUP_EXT1 RTC_EXT1_TRIG_EN +#else +#define _IO_WAKEUP_EXT1 0 +#endif +#define IO_WAKEUP_ENABLED (RTC_GPIO_TRIG_EN | _IO_WAKEUP_EXT0 | _IO_WAKEUP_EXT1) + #if CONFIG_IDF_TARGET_ESP32 /* On ESP32, for IOs with RTC functionality, setting SLP_PU, SLP_PD couldn't change IO status * from FUN_PU, FUN_PD to SLP_PU, SLP_PD at sleep. @@ -373,7 +392,12 @@ ESP_SYSTEM_INIT_FN(esp_sleep_startup_init, SECONDARY, BIT(0), 105) { #if SOC_DEEP_SLEEP_SUPPORTED // Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins - if (esp_reset_reason() == ESP_RST_DEEPSLEEP) { +#if SOC_PMU_SUPPORTED + uint32_t io_wakeup_enabled = pmu_ll_hp_get_wakeup_enable(&PMU) & IO_WAKEUP_ENABLED; +#else + uint32_t io_wakeup_enabled = rtc_cntl_ll_get_wakeup_enable() & IO_WAKEUP_ENABLED; +#endif + if (esp_reset_reason() == ESP_RST_DEEPSLEEP && io_wakeup_enabled) { esp_deep_sleep_wakeup_io_reset(); } #endif //#if SOC_DEEP_SLEEP_SUPPORTED