From b45e51fc650cbca1d11bdcb0351258e61fb412d0 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Mon, 10 Aug 2026 22:06:00 +0800 Subject: [PATCH] change(esp_hw_support): optimize pmu_sleep RAM cost --- components/esp_hw_support/linker.lf | 8 +++++++- components/esp_hw_support/port/esp32h2/pmu_sleep.c | 2 +- components/esp_hw_support/port/esp32s31/pmu_sleep.c | 4 ++-- components/hal/esp32c5/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32c6/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32c61/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32h2/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32h21/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32h4/include/hal/lp_aon_ll.h | 3 ++- 9 files changed, 22 insertions(+), 10 deletions(-) diff --git a/components/esp_hw_support/linker.lf b/components/esp_hw_support/linker.lf index 4a85d745edf..c318e068bdc 100644 --- a/components/esp_hw_support/linker.lf +++ b/components/esp_hw_support/linker.lf @@ -47,7 +47,13 @@ entries: pmu_init (noflash) pmu_param (noflash) if SOC_LIGHT_SLEEP_SUPPORTED = y: - pmu_sleep (noflash) + if SPIRAM_FLASH_LOAD_TO_PSRAM = y || PM_SLP_IRAM_OPT = y: + pmu_sleep (noflash) + else: + if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE != y: + pmu_sleep:pmu_sleep_start (noflash) + pmu_sleep:pmu_sleep_finish (noflash) + pmu_sleep:pmu_sleep_get_wakup_retention_cost (noflash) if PM_SLEEP_CLK_ICG_ENABLE = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP != y: pmu_sleep_clock_icg:pmu_sleep_clock_icg_config (noflash) sleep_mspi (noflash) diff --git a/components/esp_hw_support/port/esp32h2/pmu_sleep.c b/components/esp_hw_support/port/esp32h2/pmu_sleep.c index da5f78af2eb..42d9b46541e 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32h2/pmu_sleep.c @@ -57,7 +57,7 @@ void pmu_sleep_enable_regdma_backup(void) pmu_hal_hp_set_sleep_active_backup_enable(PMU_instance()->hal); } -void pmu_sleep_disable_regdma_backup(void) +IRAM_ATTR void pmu_sleep_disable_regdma_backup(void) { assert(PMU_instance()->hal); pmu_hal_hp_set_sleep_active_backup_disable(PMU_instance()->hal); diff --git a/components/esp_hw_support/port/esp32s31/pmu_sleep.c b/components/esp_hw_support/port/esp32s31/pmu_sleep.c index 798ba0e02aa..42c0398c089 100644 --- a/components/esp_hw_support/port/esp32s31/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32s31/pmu_sleep.c @@ -345,7 +345,7 @@ void pmu_sleep_init(const pmu_sleep_config_t *config, bool dslp) pmu_sleep_param_init(PMU_instance(), &config->param, dslp); } -IRAM_ATTR uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp) +uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu, bool dslp) { if (!dslp) { #if !BOOTLOADER_BUILD && CONFIG_SPIRAM @@ -385,7 +385,7 @@ IRAM_ATTR uint32_t pmu_sleep_get_reject_cause(void) return pmu_ll_hp_get_reject_cause(PMU_instance()->hal->dev); } -IRAM_ATTR bool pmu_sleep_finish(bool dslp) +bool pmu_sleep_finish(bool dslp) { #ifndef CONFIG_IDF_ENV_FPGA // Wait eFuse memory update done. diff --git a/components/hal/esp32c5/include/hal/lp_aon_ll.h b/components/hal/esp32c5/include/hal/lp_aon_ll.h index f077dc59c82..6a456d33dae 100644 --- a/components/hal/esp32c5/include/hal/lp_aon_ll.h +++ b/components/hal/esp32c5/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32c5/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32c6/include/hal/lp_aon_ll.h b/components/hal/esp32c6/include/hal/lp_aon_ll.h index d2ce8514029..1ff15d3f25f 100644 --- a/components/hal/esp32c6/include/hal/lp_aon_ll.h +++ b/components/hal/esp32c6/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32c6/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32c61/include/hal/lp_aon_ll.h b/components/hal/esp32c61/include/hal/lp_aon_ll.h index 82702c90df7..98469fe9fe7 100644 --- a/components/hal/esp32c61/include/hal/lp_aon_ll.h +++ b/components/hal/esp32c61/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32c61/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32h2/include/hal/lp_aon_ll.h b/components/hal/esp32h2/include/hal/lp_aon_ll.h index 50230e4229f..ce84c75caef 100644 --- a/components/hal/esp32h2/include/hal/lp_aon_ll.h +++ b/components/hal/esp32h2/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32h2/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32h21/include/hal/lp_aon_ll.h b/components/hal/esp32h21/include/hal/lp_aon_ll.h index 55d890825a2..fd849e9184f 100644 --- a/components/hal/esp32h21/include/hal/lp_aon_ll.h +++ b/components/hal/esp32h21/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32h21/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32h4/include/hal/lp_aon_ll.h b/components/hal/esp32h4/include/hal/lp_aon_ll.h index 5a00458d3dc..43121110925 100644 --- a/components/hal/esp32h4/include/hal/lp_aon_ll.h +++ b/components/hal/esp32h4/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32h4/rom/rtc.h" @@ -82,7 +83,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */