fix(usb_phy): Fixed USB PHY clock during low-power modes

On ESP32-S3, USB PHY is clocked from BBPLL,
however if the BBPLL is not used as CPU clock source,
the power management unit can turn it off.
This commit registers USB as BBPLL consumer so it is not turned off.

Closes https://github.com/espressif/esp-idf/issues/15451

components/esp_hw_support/include/esp_private/rtc_clk.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -43,9 +43,10 @@ void rtc_clk_cpu_freq_set_xtal_for_sleep(void);
 /**
  * @brief Notify that the BBPLL has a new in-use consumer
  *
- * Currently, this function is only used for tracking whether USB Serial/JTAG is using the 48MHz PHY clock
+ * Currently, this function is used for tracking whether USB PHY is using the 48MHz PHY clock.
  *
- * Note: Calling this function only helps to not disable the BBPLL clock in `rtc_clk_cpu_freq_set_config`.
+ * The first consumer enables BBPLL analog power. Later `rtc_clk_cpu_freq_set_config` will not
+ * disable BBPLL while any consumer remains.
  */
 void rtc_clk_bbpll_add_consumer(void);