fix(sdio_slave): align buffer size checks with descriptor limits

Define per-target SDIO slave descriptor buffer limits in the LL layer and validate queued send buffers against the 4-byte aligned effective maximum. Update the public docs to describe the chip-dependent limit instead of hardcoding 4092 bytes.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
morris
2026-06-22 23:24:39 +08:00
co-authored by Cursor
parent b732ab02a4
commit b26d612698
6 changed files with 16 additions and 5 deletions
+4 -1
View File
@@ -91,6 +91,8 @@ The driver of FIFOs works as below:
#include "hal/sdio_slave_hal.h"
#include "hal/gpio_hal.h"
#define SDIO_SLAVE_DMA_DESC_MAX_BUF_SIZE_ALIGNED_DOWN (SDIO_SLAVE_LL_DMA_DESC_MAX_BUF_SIZE & ~0x3U)
#define SDIO_SLAVE_CHECK(res, str, ret_val) do { if(!(res)){\
SDIO_SLAVE_LOGE("%s", str);\
return ret_val;\
@@ -597,7 +599,8 @@ static void sdio_intr_send(void *arg)
esp_err_t sdio_slave_send_queue(uint8_t *addr, size_t len, void *arg, TickType_t wait)
{
SDIO_SLAVE_CHECK(len > 0 && len <= 4092, "length out of range: (0, 4092]", ESP_ERR_INVALID_ARG);
SDIO_SLAVE_CHECK(len > 0 && len <= SDIO_SLAVE_DMA_DESC_MAX_BUF_SIZE_ALIGNED_DOWN,
"length out of range for a single DMA descriptor", ESP_ERR_INVALID_ARG);
SDIO_SLAVE_CHECK(esp_ptr_dma_capable(addr) && (uint32_t)addr % 4 == 0, "buffer to send should be DMA capable and 32-bit aligned",
ESP_ERR_INVALID_ARG);