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feat(spi_flash): Add spi flash suspend support on esp32c5, esp32c61
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@@ -109,6 +109,18 @@ menu "Main Flash configuration"
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This config is used for setting Tsus parameter. Tsus means CS# high to next command after
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suspend. You can refer to the chapter of AC CHARACTERISTICS of flash datasheet.
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config SPI_FLASH_SUSPEND_TRS_VAL_US
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int "SPI flash tRS value (refer to chapter AC CHARACTERISTICS)"
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default 50
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range 20 200
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depends on SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
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help
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This config is used for setting Trs parameter. Trs means CS Latency Between Resume And Next Suspend.
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You can refer to the chapter of AC CHARACTERISTICS of flash datasheet.
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For high-performance scenarios, some flash chips allow this set value to be smaller than the
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given value in the datasheet without causing errors in the flash state machine.
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When you have any related needs, please contact espressif business team.
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config SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND
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bool "Enable XMC-C series flash chip suspend feature anyway"
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default n
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -129,6 +129,9 @@ esp_flash_t *esp_flash_default_chip = NULL;
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.cs_setup = 1,\
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}
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#define TSUS_VAL_SUSPEND CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US
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#if SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
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#define TRS_VAL_SUSPEND CONFIG_SPI_FLASH_SUSPEND_TRS_VAL_US
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#endif // SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
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#endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
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#endif // Other target
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@@ -396,6 +399,16 @@ esp_err_t esp_flash_init_default_chip(void)
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return ESP_ERR_INVALID_ARG;
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}
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cfg.tsus_val = TSUS_VAL_SUSPEND;
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#if SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
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if (TRS_VAL_SUSPEND > 400 || TRS_VAL_SUSPEND < 20) {
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// Assume that the TRS value cannot larger than 400 (because the performance might be really bad)
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// And value cannot smaller than 20 (never see that small tsus value, might be wrong)
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return ESP_ERR_INVALID_ARG;
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}
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cfg.trs_val = TRS_VAL_SUSPEND;
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#endif // SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
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#endif // CONFIG_SPI_FLASH_AUTO_SUSPEND
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#if CONFIG_SPI_FLASH_AUTO_CHECK_SUSPEND_STATUS
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