feat(spi_flash): Add spi flash suspend support on esp32c5, esp32c61

This commit is contained in:
C.S.M
2025-06-06 15:03:41 +08:00
committed by BOT
parent 4a80901841
commit b194636859
17 changed files with 300 additions and 7157 deletions
+12
View File
@@ -109,6 +109,18 @@ menu "Main Flash configuration"
This config is used for setting Tsus parameter. Tsus means CS# high to next command after
suspend. You can refer to the chapter of AC CHARACTERISTICS of flash datasheet.
config SPI_FLASH_SUSPEND_TRS_VAL_US
int "SPI flash tRS value (refer to chapter AC CHARACTERISTICS)"
default 50
range 20 200
depends on SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
help
This config is used for setting Trs parameter. Trs means CS Latency Between Resume And Next Suspend.
You can refer to the chapter of AC CHARACTERISTICS of flash datasheet.
For high-performance scenarios, some flash chips allow this set value to be smaller than the
given value in the datasheet without causing errors in the flash state machine.
When you have any related needs, please contact espressif business team.
config SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND
bool "Enable XMC-C series flash chip suspend feature anyway"
default n
+14 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -129,6 +129,9 @@ esp_flash_t *esp_flash_default_chip = NULL;
.cs_setup = 1,\
}
#define TSUS_VAL_SUSPEND CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US
#if SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
#define TRS_VAL_SUSPEND CONFIG_SPI_FLASH_SUSPEND_TRS_VAL_US
#endif // SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
#endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
#endif // Other target
@@ -396,6 +399,16 @@ esp_err_t esp_flash_init_default_chip(void)
return ESP_ERR_INVALID_ARG;
}
cfg.tsus_val = TSUS_VAL_SUSPEND;
#if SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
if (TRS_VAL_SUSPEND > 400 || TRS_VAL_SUSPEND < 20) {
// Assume that the TRS value cannot larger than 400 (because the performance might be really bad)
// And value cannot smaller than 20 (never see that small tsus value, might be wrong)
return ESP_ERR_INVALID_ARG;
}
cfg.trs_val = TRS_VAL_SUSPEND;
#endif // SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR
#endif // CONFIG_SPI_FLASH_AUTO_SUSPEND
#if CONFIG_SPI_FLASH_AUTO_CHECK_SUSPEND_STATUS