Merge branch 'bugfix/esp_idf_ulp_wakeupcauses_record_v6.0' into 'release/v6.0'

fix(ulp): record wakeup causes before lp core request sleep v6.0

See merge request espressif/esp-idf!49142

components/soc/esp32c5/include/soc/Kconfig.soc_caps.in

@@ -1686,3 +1686,7 @@ config SOC_LP_CORE_SUPPORT_STORE_LOAD_EXCEPTIONS
 config SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED
     bool
     default y
+
+config SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE
+    bool
+    default y

components/soc/esp32c5/include/soc/soc_caps.h

@@ -674,3 +674,4 @@
 #define SOC_LP_CORE_SUPPORT_ETM                     (1) /*!< LP Core supports ETM */
 #define SOC_LP_CORE_SUPPORT_STORE_LOAD_EXCEPTIONS   (1) /*!< LP Core will raise exceptions if accessing invalid addresses */
 #define SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED   (1) /*!< LP UART wakeup source is kept triggered */
+#define SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE          (1) /*!< LP core requests sleep, PMU clears both HP and LP wakeup causes */

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -1435,6 +1435,10 @@ config SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED
     bool
     default y
 
+config SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE
+    bool
+    default y
+
 config SOC_DEBUG_HAVE_OCD_STUB_BINS
     bool
     default y

components/soc/esp32c6/include/soc/soc_caps.h

@@ -589,6 +589,7 @@
 #define SOC_LP_CORE_SINGLE_INTERRUPT_VECTOR   (1) /*!< LP Core interrupts all map to a single entry in vector table */
 #define SOC_LP_CORE_SUPPORT_ETM               (1) /*!< LP Core supports ETM */
 #define SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED   (1) /*!< LP UART wakeup source is kept triggered */
+#define SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE    (1) /*!< LP core requests sleep, PMU clears both HP and LP wakeup causes */
 
 /*------------------------------------- DEBUG CAPS -------------------------------------*/
 #define SOC_DEBUG_HAVE_OCD_STUB_BINS    (1)

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -1994,3 +1994,7 @@ config SOC_LP_CORE_SUPPORT_STORE_LOAD_EXCEPTIONS
 config SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED
     bool
     default y
+
+config SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE
+    bool
+    default y

components/soc/esp32p4/include/soc/soc_caps.h

@@ -771,3 +771,4 @@
 #define SOC_LP_CORE_SUPPORT_LP_ADC                  (1) /*!< LP ADC can be accessed from the LP-Core */
 #define SOC_LP_CORE_SUPPORT_STORE_LOAD_EXCEPTIONS   (1) /*!< LP Core will raise exceptions if accessing invalid addresses */
 #define SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED   (1) /*!< LP UART wakeup source is kept triggered */
+#define SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE          (1) /*!< LP core requests sleep, PMU clears both HP and LP wakeup causes */