feat(esp_hw_support): update cpu_pd support for esp32p4 v3.0

This commit is contained in:
wuzhenghui
2025-10-14 16:33:28 +08:00
parent 0eab2428c3
commit af1c8a568d
10 changed files with 35 additions and 12 deletions
@@ -22,7 +22,7 @@ extern "C" {
* This file contains declarations of cpu retention related functions in light sleep mode. * This file contains declarations of cpu retention related functions in light sleep mode.
*/ */
#if ESP_SLEEP_POWER_DOWN_CPU || SOC_PM_SUPPORT_CPU_PD #if ESP_SLEEP_POWER_DOWN_CPU || (SOC_PM_SUPPORT_CPU_PD && !CONFIG_ESP32P4_SELECTS_REV_LESS_V3)
/** /**
* @brief Whether to allow the cpu power domain to be powered off. * @brief Whether to allow the cpu power domain to be powered off.
* *
@@ -72,7 +72,7 @@ typedef enum {
#if SOC_PM_SUPPORT_RC_FAST_PD #if SOC_PM_SUPPORT_RC_FAST_PD
ESP_PD_DOMAIN_RC_FAST, //!< Internal Fast oscillator ESP_PD_DOMAIN_RC_FAST, //!< Internal Fast oscillator
#endif #endif
#if SOC_PM_SUPPORT_CPU_PD #if SOC_PM_SUPPORT_CPU_PD && !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
ESP_PD_DOMAIN_CPU, //!< CPU core ESP_PD_DOMAIN_CPU, //!< CPU core
#endif #endif
#if SOC_PM_SUPPORT_VDDSDIO_PD #if SOC_PM_SUPPORT_VDDSDIO_PD
@@ -140,7 +140,11 @@ enum {
ESP_ERR_SLEEP_TOO_SHORT_SLEEP_DURATION = ESP_ERR_INVALID_ARG, ESP_ERR_SLEEP_TOO_SHORT_SLEEP_DURATION = ESP_ERR_INVALID_ARG,
}; };
#define ESP_SLEEP_POWER_DOWN_CPU (CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || (SOC_CPU_IN_TOP_DOMAIN && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)) #if CONFIG_ESP32P4_SELECTS_REV_LESS_V3
#define ESP_SLEEP_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
#else
#define ESP_SLEEP_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
#endif
/** /**
* @brief Disable wakeup source * @brief Disable wakeup source
@@ -7,7 +7,7 @@ endif()
set(srcs) set(srcs)
if(CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP OR if(CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP OR
(CONFIG_SOC_CPU_IN_TOP_DOMAIN AND CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)) (CONFIG_ESP32P4_SELECTS_REV_LESS_V3 AND CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP))
list(APPEND srcs "port/${target}/sleep_cpu.c") list(APPEND srcs "port/${target}/sleep_cpu.c")
if(CONFIG_PM_CPU_RETENTION_DYNAMIC) if(CONFIG_PM_CPU_RETENTION_DYNAMIC)
list(APPEND srcs "port/${target}/sleep_cpu_dynamic.c") list(APPEND srcs "port/${target}/sleep_cpu_dynamic.c")
@@ -80,6 +80,9 @@ STRUCT_BEGIN
STRUCT_FIELD (long, 4, RV_SLP_CTX_MSTATUS, mstatus) /* Machine Status */ STRUCT_FIELD (long, 4, RV_SLP_CTX_MSTATUS, mstatus) /* Machine Status */
STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVEC, mtvec) /* Machine Trap-Vector Base Address */ STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVEC, mtvec) /* Machine Trap-Vector Base Address */
STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVT, mtvt) STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVT, mtvt)
#if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
STRUCT_FIELD (long, 4, RV_SLP_CTX_MINTTHRESH, mintthresh) /* Machine intr threshold */ // TODO
#endif
STRUCT_FIELD (long, 4, RV_SLP_CTX_MCAUSE, mcause) /* Machine Trap Cause */ STRUCT_FIELD (long, 4, RV_SLP_CTX_MCAUSE, mcause) /* Machine Trap Cause */
STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVAL, mtval) /* Machine Trap Value */ STRUCT_FIELD (long, 4, RV_SLP_CTX_MTVAL, mtval) /* Machine Trap Value */
STRUCT_FIELD (long, 4, RV_SLP_CTX_MIE, mie) /* Machine intr enable */ STRUCT_FIELD (long, 4, RV_SLP_CTX_MIE, mie) /* Machine intr enable */
@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -12,6 +12,7 @@
#include "soc/cache_reg.h" #include "soc/cache_reg.h"
#define CACHE_MAP_L1_CACHE_MASK (BIT(0) | BIT(1) | BIT(4)) #define CACHE_MAP_L1_CACHE_MASK (BIT(0) | BIT(1) | BIT(4))
#define MTVT (0x307) #define MTVT (0x307)
#define MINTTHRESH (0x347)
.section .tcm.data,"aw" .section .tcm.data,"aw"
.global rv_core_critical_regs_frame .global rv_core_critical_regs_frame
@@ -93,6 +94,10 @@ rv_core_critical_regs_save:
sw t3, RV_SLP_CTX_MCAUSE(t0) sw t3, RV_SLP_CTX_MCAUSE(t0)
csrr t4, MTVT csrr t4, MTVT
sw t4, RV_SLP_CTX_MTVT(t0) sw t4, RV_SLP_CTX_MTVT(t0)
#if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
csrr t4, MINTTHRESH
sw t4, RV_SLP_CTX_MINTTHRESH(t0)
#endif
csrr t1, mtval csrr t1, mtval
sw t1, RV_SLP_CTX_MTVAL(t0) sw t1, RV_SLP_CTX_MTVAL(t0)
csrr t2, mie csrr t2, mie
@@ -177,6 +182,10 @@ rv_core_critical_regs_restore:
csrw mstatus, t2 csrw mstatus, t2
lw t4, RV_SLP_CTX_MTVT(t0) lw t4, RV_SLP_CTX_MTVT(t0)
csrw MTVT, t4 csrw MTVT, t4
#if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
lw t1, RV_SLP_CTX_MINTTHRESH(t0)
csrw MINTTHRESH, t1
#endif
lw t3, RV_SLP_CTX_MTVEC(t0) lw t3, RV_SLP_CTX_MTVEC(t0)
csrw mtvec, t3 csrw mtvec, t3
lw t1, RV_SLP_CTX_MCAUSE(t0) lw t1, RV_SLP_CTX_MCAUSE(t0)
+1 -1
View File
@@ -2689,7 +2689,7 @@ static SLEEP_FN_ATTR uint32_t get_power_down_flags(void)
} }
#endif #endif
#if SOC_PM_SUPPORT_CPU_PD && ESP_SLEEP_POWER_DOWN_CPU #if SOC_PM_SUPPORT_CPU_PD && ESP_SLEEP_POWER_DOWN_CPU && !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
if ((s_config.domain[ESP_PD_DOMAIN_CPU].pd_option != ESP_PD_OPTION_ON) && cpu_domain_pd_allowed()) { if ((s_config.domain[ESP_PD_DOMAIN_CPU].pd_option != ESP_PD_OPTION_ON) && cpu_domain_pd_allowed()) {
pd_flags |= RTC_SLEEP_PD_CPU; pd_flags |= RTC_SLEEP_PD_CPU;
} }
+6 -5
View File
@@ -94,7 +94,7 @@ menu "Power Management"
config PM_CHECK_SLEEP_RETENTION_FRAME config PM_CHECK_SLEEP_RETENTION_FRAME
bool bool
depends on (PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || \ depends on (PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || \
(SOC_CPU_IN_TOP_DOMAIN && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)) (ESP32P4_SELECTS_REV_LESS_V3 && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP))
default y if IDF_CI_BUILD default y if IDF_CI_BUILD
default n default n
help help
@@ -117,7 +117,7 @@ menu "Power Management"
config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
bool "Power down CPU in light sleep" bool "Power down CPU in light sleep"
depends on SOC_PM_SUPPORT_CPU_PD depends on SOC_PM_SUPPORT_CPU_PD && !ESP32P4_SELECTS_REV_LESS_V3
select PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP if ESP32S3_DATA_CACHE_16KB select PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP if ESP32S3_DATA_CACHE_16KB
default y default y
help help
@@ -132,8 +132,9 @@ menu "Power Management"
choice choice
bool "Retentive memory alloaction strategy for light sleep" bool "Retentive memory alloaction strategy for light sleep"
depends on SOC_PM_CPU_RETENTION_BY_SW && \ depends on SOC_PM_CPU_RETENTION_BY_SW
(PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || (PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_CPU_IN_TOP_DOMAIN)) depends on PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP || \
(PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && ESP32P4_SELECTS_REV_LESS_V3)
default PM_CPU_RETENTION_DYNAMIC default PM_CPU_RETENTION_DYNAMIC
help help
In light sleep mode, certain CPU states and data need to be preserved in memory while cpu domain In light sleep mode, certain CPU states and data need to be preserved in memory while cpu domain
@@ -177,7 +178,7 @@ menu "Power Management"
config PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP config PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
bool "Power down Digital Peripheral in light sleep (EXPERIMENTAL)" bool "Power down Digital Peripheral in light sleep (EXPERIMENTAL)"
depends on SOC_PM_SUPPORT_TOP_PD && SOC_PAU_SUPPORTED depends on SOC_PM_SUPPORT_TOP_PD && SOC_PAU_SUPPORTED
select PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP if !SOC_CPU_IN_TOP_DOMAIN select PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP if !ESP32P4_SELECTS_REV_LESS_V3
default n #TODO: enable by default if periph init/deinit management supported (WIFI-5252) default n #TODO: enable by default if periph init/deinit management supported (WIFI-5252)
help help
If enabled, digital peripherals will try to powered down in light sleep, then all related peripherals will If enabled, digital peripherals will try to powered down in light sleep, then all related peripherals will
+1 -1
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@@ -31,7 +31,7 @@ entries:
sleep_system_peripheral:peripheral_domain_pd_allowed (noflash) sleep_system_peripheral:peripheral_domain_pd_allowed (noflash)
if SOC_PM_CPU_RETENTION_BY_RTCCNTL = y && (PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y || SOC_PM_SUPPORT_TAGMEM_PD = y): if SOC_PM_CPU_RETENTION_BY_RTCCNTL = y && (PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y || SOC_PM_SUPPORT_TAGMEM_PD = y):
sleep_cpu:sleep_enable_cpu_retention (noflash) sleep_cpu:sleep_enable_cpu_retention (noflash)
if PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y || (SOC_CPU_IN_TOP_DOMAIN = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP = y): if PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP = y || (ESP32P4_SELECTS_REV_LESS_V3 = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP = y):
sleep_cpu:cpu_domain_pd_allowed (noflash) sleep_cpu:cpu_domain_pd_allowed (noflash)
if SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP = y: if SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP = y:
sleep_mmu:mmu_domain_pd_allowed (noflash) sleep_mmu:mmu_domain_pd_allowed (noflash)
@@ -271,6 +271,9 @@ This section introduces the recommended configuration and configuration steps fo
- Power down CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`) - Power down CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`)
.. only:: esp32p4
For ESP32P4, only chips with version greater than 3.0 support powering down the CPU power domain independently.
.. only:: SOC_PM_SUPPORT_TAGMEM_PD .. only:: SOC_PM_SUPPORT_TAGMEM_PD
@@ -271,6 +271,9 @@ Light-sleep 模式配置
- 关闭 CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`) - 关闭 CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`)
.. only:: esp32p4
对于 ESP32P4, 只有大于 3.0 版本的芯片才支持单独关闭 CPU 电源域。
.. only:: SOC_PM_SUPPORT_TAGMEM_PD .. only:: SOC_PM_SUPPORT_TAGMEM_PD