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feat(ppa): add sleep retention support for DMA2D and PPA

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This commit is contained in:
Song Ruo Jing
2026-07-03 21:57:39 +08:00
parent c65d0bb434
commit abe1d3ae48
20 changed files with 590 additions and 151 deletions
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components/esp_hal_dma/esp32p4/dma2d_periph.c
+31 -1
View File
@@ -1,10 +1,11 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/dma2d_periph.h"
#include "soc/dma2d_reg.h"
#include "soc/interrupts.h"
const dma2d_signal_conn_t dma2d_periph_signals = {
@@ -28,3 +29,32 @@ const dma2d_signal_conn_t dma2d_periph_signals = {
}
}
};
/** DMA2D Registers to be saved during sleep retention
*
* DMA2D driver is implemented in the way that channels are used as a pool,
* therefore, only general registers are needed to be saved during sleep retention.
*
* DMA2D_RST_CONF_REG,
* DMA2D_INTR_MEM_START_ADDR_REG, DMA2D_INTR_MEM_END_ADDR_REG, DMA2D_EXTR_MEM_START_ADDR_REG, DMA2D_EXTR_MEM_END_ADDR_REG
* DMA2D_OUT_ARB_CONFIG_REG, DMA2D_IN_ARB_CONFIG_REG
*/
#define DMA2D_RETENTION_REGS_CNT 7
#define DMA2D_RETENTION_REGS_BASE DMA2D_RST_CONF_REG
static const uint32_t dma2d_regs_map[4] = {0x7f, 0x0, 0x0, 0x0};
static const regdma_entries_config_t dma2d_regdma_entries[] = {
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_DMA2D_LINK(0x00),
DMA2D_RETENTION_REGS_BASE, DMA2D_RETENTION_REGS_BASE,
DMA2D_RETENTION_REGS_CNT, 0, 0,
dma2d_regs_map[0], dma2d_regs_map[1],
dma2d_regs_map[2], dma2d_regs_map[3]),
.owner = ENTRY(0),
},
};
const dma2d_reg_retention_info_t dma2d_reg_retention_info = {
.module = SLEEP_RETENTION_MODULE_DMA2D,
.regdma_entry_array = dma2d_regdma_entries,
.array_size = ARRAY_SIZE(dma2d_regdma_entries),
};
components/esp_hal_dma/esp32p4/include/hal/dma2d_ll.h
+4 -4
View File
@@ -100,7 +100,7 @@ extern "C" {
* @param group_id Group ID
* @param enable True to enable; false to disable
*/
static inline void dma2d_ll_enable_bus_clock(int group_id, bool enable)
static inline void _dma2d_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
HP_SYS_CLKRST.soc_clk_ctrl1.reg_dma2d_sys_clk_en = enable;
@@ -110,7 +110,7 @@ static inline void dma2d_ll_enable_bus_clock(int group_id, bool enable)
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define dma2d_ll_enable_bus_clock(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
dma2d_ll_enable_bus_clock(__VA_ARGS__); \
_dma2d_ll_enable_bus_clock(__VA_ARGS__); \
} while(0)
/**
@@ -118,7 +118,7 @@ static inline void dma2d_ll_enable_bus_clock(int group_id, bool enable)
*
* @param group_id Group ID
*/
static inline void dma2d_ll_reset_register(int group_id)
static inline void _dma2d_ll_reset_register(int group_id)
{
(void)group_id;
HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dma2d = 1;
@@ -129,7 +129,7 @@ static inline void dma2d_ll_reset_register(int group_id)
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define dma2d_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
dma2d_ll_reset_register(__VA_ARGS__); \
_dma2d_ll_reset_register(__VA_ARGS__); \
} while(0)
/**