feat(sleep): supported phy retention on esp32-h4

components/soc/esp32h4/include/soc/Kconfig.soc_caps.in

@@ -1195,6 +1195,18 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD
     bool
     default y
 
+config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+    bool
+    default y
+
+config SOC_PM_SUPPORT_PMU_MODEM_STATE
+    bool
+    default y
+
+config SOC_PM_REGDMA_RF_RETENTION_REGI2C_CONFLICT
+    bool
+    default y
+
 config SOC_PM_SUPPORT_PMU_CLK_ICG
     bool
     default y
@@ -1225,12 +1237,20 @@ config SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN
 
 config SOC_PM_PAU_LINK_NUM
     int
-    default 4
+    default 5
 
 config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
     bool
     default y
 
+config SOC_PM_RETENTION_MODULE_NUM
+    int
+    default 64
+
+config SOC_PM_PAU_REGDMA_LINK_IDX_PHY
+    int
+    default 4
+
 config SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH
     bool
     default y

components/soc/esp32h4/include/soc/retention_periph_defs.h

@@ -57,6 +57,8 @@ typedef enum periph_retention_module {
     SLEEP_RETENTION_MODULE_BT_BB        = 32,
     SLEEP_RETENTION_MODULE_802154_MAC   = 33,
     SLEEP_RETENTION_MODULE_POWER        = 34,
+    SLEEP_RETENTION_MODULE_MODEM_PHY    = 35,
+    SLEEP_RETENTION_MODULE_PHY_FE       = 36,
 
     SLEEP_RETENTION_MODULE_MAX,
 } periph_retention_module_t;

components/soc/esp32h4/include/soc/soc_caps.h

@@ -494,9 +494,11 @@
 #define SOC_PM_SUPPORT_MAC_BB_PD        (1)
 #define SOC_PM_SUPPORT_RTC_PERIPH_PD    (1)
 
-// #define SOC_PM_SUPPORT_PMU_MODEM_STATE  (1)
+#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1)
+#define SOC_PM_SUPPORT_PMU_MODEM_STATE  (1)
 // /* macro redefine for pass esp_wifi headers md5sum check */
 // #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE
+#define SOC_PM_REGDMA_RF_RETENTION_REGI2C_CONFLICT    (1)
 
 #define SOC_PM_SUPPORT_PMU_CLK_ICG          (1)
 #define SOC_PM_SUPPORT_PMU_RETENTION_CLK_ICG   (1)
@@ -507,8 +509,10 @@
 #define SOC_PM_MODEM_RETENTION_BY_REGDMA    (1)
 #define SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN (1)
 
-#define SOC_PM_PAU_LINK_NUM                 (4)
+#define SOC_PM_PAU_LINK_NUM                 (5)
 #define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
+#define SOC_PM_RETENTION_MODULE_NUM         (64)
+#define SOC_PM_PAU_REGDMA_LINK_IDX_PHY      (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM)
 
 #define SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH    (1) // In ESP32H4, RTC_PERIPH should be pd only together with TOP, otherwise there is some current leak.
 #define SOC_PM_BBPLL_PD_IN_MODEM_STATE      (1)