mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
refactor(lcd): move sleep retention config into driver layer
Move LCD I80 retention descriptors and related comments out of esp_hal_lcd and into esp_lcd so the backup policy stays with the driver implementation.
This commit is contained in:
@@ -31,6 +31,9 @@ endif()
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if(CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED)
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list(APPEND srcs "i80/esp_lcd_panel_io_i80.c")
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if(CONFIG_SOC_PAU_SUPPORTED)
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list(APPEND srcs "i80/${target}/lcd_retention.c")
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endif()
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endif()
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if(CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED)
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@@ -45,7 +48,7 @@ endif()
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${includes}
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PRIV_INCLUDE_DIRS "priv_include"
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PRIV_INCLUDE_DIRS "priv_include" "i80"
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PRIV_REQUIRES ${priv_requires}
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REQUIRES ${public_requires}
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LDFRAGMENTS linker.lf)
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@@ -0,0 +1,42 @@
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/*
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* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "i80_io_priv.h"
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#include "soc/lcd_cam_reg.h"
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/**
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* LCD_CAM Registers to be saved during sleep retention
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* - LCD Clock Configuration registers: LCDCAM_LCD_CLOCK_REG (0x0)
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* - LCD User Configuration registers: LCDCAM_LCD_USER_REG (0x14), LCDCAM_LCD_MISC_REG (0x18)
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* - LCD Control registers: LCDCAM_LCD_CTRL_REG (0x1c) (Note: lcd_rgb_mode_en is in this register)
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* - LCD Delay Mode Configuration registers: LCDCAM_LCD_DLY_MODE_CFG1_REG (0x30), LCDCAM_LCD_DLY_MODE_CFG2_REG (0x38)
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* - LCD DMA Interrupt Enable register: LCDCAM_LC_DMA_INT_ENA_REG (0x64)
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*
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* NOTE: Only I80 LCD supports sleep retention, not RGB LCD.
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*/
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#define LCD_RETENTION_REGS_CNT 7
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#define LCD_RETENTION_REGS_BASE (DR_REG_LCDCAM_BASE + 0x0)
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static const uint32_t lcd_cam_regs_map[4] = {0x20050e1, 0x0, 0x0, 0x0};
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static const regdma_entries_config_t lcd_regs_retention[] = {
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// backup stage: save configuration registers
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// restore stage: restore the configuration registers
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[0] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_LCDCAM_LINK(0x00),
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LCD_RETENTION_REGS_BASE, LCD_RETENTION_REGS_BASE,
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LCD_RETENTION_REGS_CNT, 0, 0,
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lcd_cam_regs_map[0], lcd_cam_regs_map[1],
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lcd_cam_regs_map[2], lcd_cam_regs_map[3]),
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.owner = ENTRY(0),
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},
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};
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const lcd_i80_reg_retention_info_t lcd_i80_reg_retention_info[1] = {
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[0] = {
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.regdma_entry_array = lcd_regs_retention,
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.array_size = ARRAY_SIZE(lcd_regs_retention),
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.retention_module = SLEEP_RETENTION_MODULE_LCDCAM
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},
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};
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@@ -0,0 +1,42 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "i80_io_priv.h"
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#include "soc/lcd_cam_reg.h"
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/**
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* LCD_CAM Registers to be saved during sleep retention
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* - LCD Clock Configuration registers: LCDCAM_LCD_CLOCK_REG (0x0)
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* - LCD User Configuration registers: LCDCAM_LCD_USER_REG (0x14), LCDCAM_LCD_MISC_REG (0x18)
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* - LCD Delay Mode Configuration registers: LCDCAM_LCD_DLY_MODE_CFG1_REG (0x34), LCDCAM_LCD_DLY_MODE_CFG2_REG (0x38)
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* - LCD Transfer Buffer Configuration registers: LCDCAM_LCD_TRANS_BUFF_CFG_REG(0x3C)
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* - LCD DMA Interrupt Enable register: LCDCAM_LC_DMA_INT_ENA_REG (0x64)
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*
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* NOTE: Only I80 LCD supports sleep retention, not RGB LCD.
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*/
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#define LCD_RETENTION_REGS_CNT 7
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#define LCD_RETENTION_REGS_BASE (DR_REG_LCDCAM_BASE + 0x0)
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static const uint32_t lcd_cam_regs_map[4] = {0x200e061, 0x0, 0x0, 0x0};
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static const regdma_entries_config_t lcd_regs_retention[] = {
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// backup stage: save configuration registers
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// restore stage: restore the configuration registers
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[0] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_LCDCAM_LINK(0x00),
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LCD_RETENTION_REGS_BASE, LCD_RETENTION_REGS_BASE,
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LCD_RETENTION_REGS_CNT, 0, 0,
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lcd_cam_regs_map[0], lcd_cam_regs_map[1],
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lcd_cam_regs_map[2], lcd_cam_regs_map[3]),
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.owner = ENTRY(0) | ENTRY(2),
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},
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};
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const lcd_i80_reg_retention_info_t lcd_i80_reg_retention_info[1] = {
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[0] = {
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.regdma_entry_array = lcd_regs_retention,
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.array_size = ARRAY_SIZE(lcd_regs_retention),
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.retention_module = SLEEP_RETENTION_MODULE_LCDCAM
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},
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};
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@@ -164,7 +164,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
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}
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#if I80_USE_RETENTION_LINK
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// no need to acquire mutex, because the bus is exclusive
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sleep_retention_module_t module_id = soc_i80_lcd_retention_info[bus_id].retention_module;
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sleep_retention_module_t module_id = lcd_i80_reg_retention_info[bus_id].retention_module;
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sleep_retention_module_init_param_t init_param = {
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.cbs = {
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.create = {
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@@ -292,7 +292,7 @@ esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus)
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bus->clk_src = SOC_MOD_CLK_INVALID;
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}
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#if I80_USE_RETENTION_LINK
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const periph_retention_module_t module_id = soc_i80_lcd_retention_info[bus_id].retention_module;
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const periph_retention_module_t module_id = lcd_i80_reg_retention_info[bus_id].retention_module;
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sleep_retention_module_detach(module_id);
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if (sleep_retention_is_module_created(module_id)) {
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assert(sleep_retention_is_module_inited(module_id));
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@@ -616,9 +616,9 @@ static esp_err_t lcd_i80_create_sleep_retention_link_cb(void *arg)
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{
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esp_lcd_i80_bus_t *bus = (esp_lcd_i80_bus_t *)arg;
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int bus_id = bus->bus_id;
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sleep_retention_module_t module_id = soc_i80_lcd_retention_info[bus_id].retention_module;
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esp_err_t err = sleep_retention_entries_create(soc_i80_lcd_retention_info[bus_id].regdma_entry_array,
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soc_i80_lcd_retention_info[bus_id].array_size,
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sleep_retention_module_t module_id = lcd_i80_reg_retention_info[bus_id].retention_module;
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esp_err_t err = sleep_retention_entries_create(lcd_i80_reg_retention_info[bus_id].regdma_entry_array,
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lcd_i80_reg_retention_info[bus_id].array_size,
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REGDMA_LINK_PRI_LCDCAM, module_id);
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ESP_RETURN_ON_ERROR(err, TAG, "create retention link failed");
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return ESP_OK;
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@@ -627,7 +627,7 @@ static esp_err_t lcd_i80_create_sleep_retention_link_cb(void *arg)
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static void lcd_i80_create_retention_module(esp_lcd_i80_bus_t *bus)
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{
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int bus_id = bus->bus_id;
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sleep_retention_module_t module_id = soc_i80_lcd_retention_info[bus_id].retention_module;
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sleep_retention_module_t module_id = lcd_i80_reg_retention_info[bus_id].retention_module;
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if (sleep_retention_is_module_inited(module_id) && !sleep_retention_is_module_created(module_id)) {
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if (sleep_retention_module_allocate(module_id) != ESP_OK) {
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@@ -42,6 +42,10 @@
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#include "hal/lcd_periph.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_sig_map.h"
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#if SOC_HAS(PAU)
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#include "soc/regdma.h"
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#include "soc/retention_periph_defs.h"
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#endif
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///!< Logging settings
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#define TAG "lcd.i80"
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@@ -50,6 +54,16 @@
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extern "C" {
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#endif
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#if SOC_HAS(PAU)
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typedef struct {
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const periph_retention_module_t retention_module;
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const regdma_entries_config_t *regdma_entry_array;
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uint32_t array_size;
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} lcd_i80_reg_retention_info_t;
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extern const lcd_i80_reg_retention_info_t lcd_i80_reg_retention_info[LCD_LL_GET(I80_BUS_NUM)];
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#endif
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#ifdef __cplusplus
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}
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#endif
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