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refactor(lcd): move sleep retention config into driver layer

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Move LCD I80 retention descriptors and related comments out of
esp_hal_lcd and into esp_lcd so the backup policy stays with the driver
implementation.
This commit is contained in:
morris
2026-07-10 10:05:01 +08:00
parent 907f4a66d9
commit ab70690fff
8 changed files with 108 additions and 91 deletions
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components/esp_hal_lcd/esp32p4/lcd_periph.c
-34
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@@ -81,37 +81,3 @@ const soc_lcd_rgb_signal_desc_t soc_lcd_rgb_signals[1] = {
.disp_sig = SIG_GPIO_OUT_IDX,
}
};
/**
* LCD_CAM Registers to be saved during sleep retention
* - LCD Clock Configuration registers: LCDCAM_LCD_CLOCK_REG (0x0)
* - LCD User Configuration registers: LCDCAM_LCD_USER_REG (0x14), LCDCAM_LCD_MISC_REG (0x18)
* - LCD Control registers: LCDCAM_LCD_CTRL_REG (0x1c) (Note: lcd_rgb_mode_en is in this register)
* - LCD Delay Mode Configuration registers: LCDCAM_LCD_DLY_MODE_CFG1_REG (0x30), LCDCAM_LCD_DLY_MODE_CFG2_REG (0x38)
* - LCD DMA Interrupt Enable register: LCDCAM_LC_DMA_INT_ENA_REG (0x64)
*
* NOTE: Only I80 LCD supports sleep retention, not RGB LCD.
*/
#define LCD_RETENTION_REGS_CNT 7
#define LCD_RETENTION_REGS_BASE (DR_REG_LCDCAM_BASE + 0x0)
static const uint32_t lcd_cam_regs_map[4] = {0x20050e1, 0x0, 0x0, 0x0};
static const regdma_entries_config_t lcd_regs_retention[] = {
// backup stage: save configuration registers
// restore stage: restore the configuration registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_LCDCAM_LINK(0x00),
LCD_RETENTION_REGS_BASE, LCD_RETENTION_REGS_BASE,
LCD_RETENTION_REGS_CNT, 0, 0,
lcd_cam_regs_map[0], lcd_cam_regs_map[1],
lcd_cam_regs_map[2], lcd_cam_regs_map[3]),
.owner = ENTRY(0),
},
};
const soc_i80_lcd_retention_info_t soc_i80_lcd_retention_info[1] = {
[0] = {
.regdma_entry_array = lcd_regs_retention,
.array_size = ARRAY_SIZE(lcd_regs_retention),
.retention_module = SLEEP_RETENTION_MODULE_LCDCAM
},
};
components/esp_hal_lcd/esp32s31/lcd_periph.c
-34
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@@ -117,37 +117,3 @@ const soc_lcd_rgb_iomux_desc_t soc_lcd_rgb_iomux_descs[1] = {
.de_pin = { .gpio_num = GPIO_NUM_43, .func = FUNC_GPIO43_LCD_H_ENABLE_PAD },
},
};
/**
* LCD_CAM Registers to be saved during sleep retention
* - LCD Clock Configuration registers: LCDCAM_LCD_CLOCK_REG (0x0)
* - LCD User Configuration registers: LCDCAM_LCD_USER_REG (0x14), LCDCAM_LCD_MISC_REG (0x18)
* - LCD Delay Mode Configuration registers: LCDCAM_LCD_DLY_MODE_CFG1_REG (0x34), LCDCAM_LCD_DLY_MODE_CFG2_REG (0x38)
* - LCD Transfer Buffer Configuration registers: LCDCAM_LCD_TRANS_BUFF_CFG_REG(0x3C)
* - LCD DMA Interrupt Enable register: LCDCAM_LC_DMA_INT_ENA_REG (0x64)
*
* NOTE: Only I80 LCD supports sleep retention, not RGB LCD.
*/
#define LCD_RETENTION_REGS_CNT 7
#define LCD_RETENTION_REGS_BASE (DR_REG_LCDCAM_BASE + 0x0)
static const uint32_t lcd_cam_regs_map[4] = {0x200e061, 0x0, 0x0, 0x0};
static const regdma_entries_config_t lcd_regs_retention[] = {
// backup stage: save configuration registers
// restore stage: restore the configuration registers
[0] = {
.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_LCDCAM_LINK(0x00),
LCD_RETENTION_REGS_BASE, LCD_RETENTION_REGS_BASE,
LCD_RETENTION_REGS_CNT, 0, 0,
lcd_cam_regs_map[0], lcd_cam_regs_map[1],
lcd_cam_regs_map[2], lcd_cam_regs_map[3]),
.owner = ENTRY(0) | ENTRY(2),
},
};
const soc_i80_lcd_retention_info_t soc_i80_lcd_retention_info[1] = {
[0] = {
.regdma_entry_array = lcd_regs_retention,
.array_size = ARRAY_SIZE(lcd_regs_retention),
.retention_module = SLEEP_RETENTION_MODULE_LCDCAM
},
};
components/esp_hal_lcd/include/hal/lcd_periph.h
-16
View File
@@ -9,17 +9,12 @@
#include <stddef.h>
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/regdma.h"
#if SOC_HAS(I2S)
#include "hal/i2s_ll.h"
#endif
#if SOC_HAS(LCDCAM_I80_LCD) || SOC_HAS(LCDCAM_RGB_LCD)
#include "hal/lcd_ll.h"
#endif
#if SOC_HAS(PAU)
#include "soc/retention_periph_defs.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
@@ -80,17 +75,6 @@ typedef struct {
extern const soc_lcd_i2s_signal_desc_t soc_lcd_i2s_signals[I2S_LL_GET(INST_NUM)];
#endif // SOC_HAS(I2S_I80_LCD)
#if SOC_HAS(PAU) && SOC_HAS(LCDCAM_I80_LCD)
// Only LCDCAM I80 LCD supports sleep retention
typedef struct {
const periph_retention_module_t retention_module;
const regdma_entries_config_t *regdma_entry_array;
uint32_t array_size;
} soc_i80_lcd_retention_info_t;
extern const soc_i80_lcd_retention_info_t soc_i80_lcd_retention_info[LCD_LL_GET(I80_BUS_NUM)];
#endif // SOC_HAS(PAU) && SOC_HAS(LCDCAM_I80_LCD)
#ifdef __cplusplus
}
#endif