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feat(esp_hw_support): add support for SOC_CLOCK_SOURCE_CG and WIFI_BB_80X1 clock in modem clock management
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@@ -393,19 +393,25 @@ static inline void modem_syscon_ll_clk_wifibb_configure(modem_syscon_dev_t *hw,
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{
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/* Configure
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clk_wifibb_22m / clk_wifibb_40m / clk_wifibb_80m
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clk_wifibb_40x / clk_wifibb_80x / clk_wifibb_40x1 / clk_wifibb_80x1
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clk_wifibb_40x / clk_wifibb_80x / clk_wifibb_40x1
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clk_wifibb_160x1
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clk_wifibb_44m is configured in modem_syscon_ll_enable_wifibb_44m_clock
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clk_wifibb_80x1 is configured in modem_syscon_ll_enable_wifibb_80x1_clock
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*/
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modem_syscon_ll_clk_conf1_configure(hw, en, 0x1fb);
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modem_syscon_ll_clk_conf1_configure(hw, en, 0x17b);
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}
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__attribute__((always_inline))
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static inline bool modem_syscon_ll_wifibb_clock_is_enabled(modem_syscon_dev_t *hw)
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{
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// Check if any of the wifibb clocks are enabled
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return (hw->clk_conf1.val & 0x1fb) == 0x1fb;
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return (hw->clk_conf1.val & 0x17b) == 0x17b;
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}
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__attribute__((always_inline))
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static inline bool modem_syscon_ll_wifibb_80x1_clock_is_enabled(modem_syscon_dev_t *hw)
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{
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return hw->clk_conf1.clk_wifibb_80x1_en;
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}
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__attribute__((always_inline))
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@@ -7,6 +7,7 @@
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// The HAL layer for MODEM CLOCK (ESP32-S31 specific part)
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#include <stdbool.h>
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#include "soc/soc.h"
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#include "soc/hp_sys_clkrst_reg.h"
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#include "esp_attr.h"
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#include "hal/modem_clock_hal.h"
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#include "hal/modem_clock_types.h"
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@@ -117,6 +118,18 @@ uint32_t IRAM_ATTR modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_c
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return bitmap;
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}
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void IRAM_ATTR modem_clock_hal_enable_soc_pll_source_cg(modem_clock_hal_context_t *hal, bool enable)
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{
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(void)hal;
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HP_SYS_CLKRST.modem_conf.val = enable ? 0x3d : 0x25;
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}
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bool IRAM_ATTR modem_clock_hal_soc_pll_source_cg_is_enabled(modem_clock_hal_context_t *hal)
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{
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(void)hal;
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return (HP_SYS_CLKRST.modem_conf.val == 0x3d);
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}
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void IRAM_ATTR modem_clock_hal_enable_modem_common_fe_clock(modem_clock_hal_context_t *hal, bool enable)
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{
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if (enable) {
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