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fix(bootloader): fix bootloader bad spi pin drv config and clear all wpu/wpd by default

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wuzhenghui
2026-01-09 17:58:51 +08:00
parent 5b879a8f58
commit aaeec3228d
4 changed files with 188 additions and 28 deletions
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28
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -24,6 +24,7 @@
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
#include "esp_private/bootloader_flash_internal.h"
#include "hal/mspi_iomux_ll.h"
void IRAM_ATTR bootloader_flash_update_id(void)
{
@@ -77,18 +78,19 @@ ESP_LOG_ATTR_TAG(TAG, "boot.esp32p4");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
uint8_t clk_gpio_num = MSPI_IOMUX_PIN_NUM_CLK;
uint8_t q_gpio_num = MSPI_IOMUX_PIN_NUM_MISO;
uint8_t d_gpio_num = MSPI_IOMUX_PIN_NUM_MOSI;
uint8_t cs0_gpio_num = MSPI_IOMUX_PIN_NUM_CS0;
uint8_t hd_gpio_num = MSPI_IOMUX_PIN_NUM_HD;
uint8_t wp_gpio_num = MSPI_IOMUX_PIN_NUM_WP;
esp_rom_gpio_pad_set_drv(clk_gpio_num, drv);
esp_rom_gpio_pad_set_drv(q_gpio_num, drv);
esp_rom_gpio_pad_set_drv(d_gpio_num, drv);
esp_rom_gpio_pad_set_drv(cs0_gpio_num, drv);
esp_rom_gpio_pad_set_drv(hd_gpio_num, drv);
esp_rom_gpio_pad_set_drv(wp_gpio_num, drv);
// Configure all Flash pins: clear pull-up/pull-down, set drive strength
// SPI CS is external pull-uped so there no need to set internal pull-up
mspi_iomux_flash_pin_cfg_t flash_cfg = {
.hys = 0,
.ie = 0,
.wpu = 0,
.wpd = 0,
.drv = drv,
.reserved = 0
};
for (mspi_iomux_flash_pin_id_t pin_id = MSPI_IOMUX_FLASH_PIN_ID_CS; pin_id < MSPI_IOMUX_FLASH_PIN_ID_MAX; pin_id++) {
mspi_iomux_ll_set_flash_pin_cfg(pin_id, &flash_cfg);
}
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)