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Merge branch 'bugfix/fix_i2s_std_initializer_order_for_cpp_compiler_v5.4' into 'release/v5.4'

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fix(i2s): fixed i2s_std initializer order for cpp compiler (v5.4)

See merge request espressif/esp-idf!37047
This commit is contained in:
Jiang Jiang Jian
2025-02-21 11:48:58 +08:00
parent 6150ea9a43 b18506da8b
commit aa97a0fc3c
13 changed files with 142 additions and 221 deletions
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components/soc/esp32c5/register/soc/i2s_reg.h
+1 -51
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -836,56 +836,6 @@ extern "C" {
#define I2S_TX_IIR_HP_MULT12_0_V 0x00000007U
#define I2S_TX_IIR_HP_MULT12_0_S 23
/** I2S_RX_PDM2PCM_CONF_REG register
* I2S RX configure register
*/
#define I2S_RX_PDM2PCM_CONF_REG(i) (REG_I2S_BASE(i) + 0x4c)
/** I2S_RX_PDM2PCM_EN : R/W; bitpos: [19]; default: 0;
* 1: Enable PDM2PCM RX mode. 0: DIsable.
*/
#define I2S_RX_PDM2PCM_EN (BIT(19))
#define I2S_RX_PDM2PCM_EN_M (I2S_RX_PDM2PCM_EN_V << I2S_RX_PDM2PCM_EN_S)
#define I2S_RX_PDM2PCM_EN_V 0x00000001U
#define I2S_RX_PDM2PCM_EN_S 19
/** I2S_RX_PDM_SINC_DSR_16_EN : R/W; bitpos: [20]; default: 0;
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
* sampling rate is 128. 0: down sampling rate is 64.
*/
#define I2S_RX_PDM_SINC_DSR_16_EN (BIT(20))
#define I2S_RX_PDM_SINC_DSR_16_EN_M (I2S_RX_PDM_SINC_DSR_16_EN_V << I2S_RX_PDM_SINC_DSR_16_EN_S)
#define I2S_RX_PDM_SINC_DSR_16_EN_V 0x00000001U
#define I2S_RX_PDM_SINC_DSR_16_EN_S 20
/** I2S_RX_PDM2PCM_AMPLIFY_NUM : R/W; bitpos: [24:21]; default: 1;
* Configure PDM RX amplify number.
*/
#define I2S_RX_PDM2PCM_AMPLIFY_NUM 0x0000000FU
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_M (I2S_RX_PDM2PCM_AMPLIFY_NUM_V << I2S_RX_PDM2PCM_AMPLIFY_NUM_S)
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_V 0x0000000FU
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_S 21
/** I2S_RX_PDM_HP_BYPASS : R/W; bitpos: [25]; default: 0;
* I2S PDM RX bypass hp filter or not.
*/
#define I2S_RX_PDM_HP_BYPASS (BIT(25))
#define I2S_RX_PDM_HP_BYPASS_M (I2S_RX_PDM_HP_BYPASS_V << I2S_RX_PDM_HP_BYPASS_S)
#define I2S_RX_PDM_HP_BYPASS_V 0x00000001U
#define I2S_RX_PDM_HP_BYPASS_S 25
/** I2S_RX_IIR_HP_MULT12_5 : R/W; bitpos: [28:26]; default: 6;
* The fourth parameter of PDM RX IIR_HP filter stage 2 is (504 +
* LP_I2S_RX_IIR_HP_MULT12_5[2:0])
*/
#define I2S_RX_IIR_HP_MULT12_5 0x00000007U
#define I2S_RX_IIR_HP_MULT12_5_M (I2S_RX_IIR_HP_MULT12_5_V << I2S_RX_IIR_HP_MULT12_5_S)
#define I2S_RX_IIR_HP_MULT12_5_V 0x00000007U
#define I2S_RX_IIR_HP_MULT12_5_S 26
/** I2S_RX_IIR_HP_MULT12_0 : R/W; bitpos: [31:29]; default: 7;
* The fourth parameter of PDM RX IIR_HP filter stage 1 is (504 +
* LP_I2S_RX_IIR_HP_MULT12_0[2:0])
*/
#define I2S_RX_IIR_HP_MULT12_0 0x00000007U
#define I2S_RX_IIR_HP_MULT12_0_M (I2S_RX_IIR_HP_MULT12_0_V << I2S_RX_IIR_HP_MULT12_0_S)
#define I2S_RX_IIR_HP_MULT12_0_V 0x00000007U
#define I2S_RX_IIR_HP_MULT12_0_S 29
/** I2S_RX_TDM_CTRL_REG register
* I2S TX TDM mode control register
*/
components/soc/esp32c5/register/soc/i2s_struct.h
+2 -39
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -295,43 +295,6 @@ typedef union {
uint32_t val;
} i2s_rx_recomb_dma_chn_reg_t;
/** Type of rx_pdm2pcm_conf register
* I2S RX configure register
*/
typedef union {
struct {
uint32_t reserved_0:19;
/** rx_pdm2pcm_en : R/W; bitpos: [19]; default: 0;
* 1: Enable PDM2PCM RX mode. 0: DIsable.
*/
uint32_t rx_pdm2pcm_en:1;
/** rx_pdm_sinc_dsr_16_en : R/W; bitpos: [20]; default: 0;
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
* sampling rate is 128. 0: down sampling rate is 64.
*/
uint32_t rx_pdm_sinc_dsr_16_en:1;
/** rx_pdm2pcm_amplify_num : R/W; bitpos: [24:21]; default: 1;
* Configure PDM RX amplify number.
*/
uint32_t rx_pdm2pcm_amplify_num:4;
/** rx_pdm_hp_bypass : R/W; bitpos: [25]; default: 0;
* I2S PDM RX bypass hp filter or not.
*/
uint32_t rx_pdm_hp_bypass:1;
/** rx_iir_hp_mult12_5 : R/W; bitpos: [28:26]; default: 6;
* The fourth parameter of PDM RX IIR_HP filter stage 2 is (504 +
* LP_I2S_RX_IIR_HP_MULT12_5[2:0])
*/
uint32_t rx_iir_hp_mult12_5:3;
/** rx_iir_hp_mult12_0 : R/W; bitpos: [31:29]; default: 7;
* The fourth parameter of PDM RX IIR_HP filter stage 1 is (504 +
* LP_I2S_RX_IIR_HP_MULT12_0[2:0])
*/
uint32_t rx_iir_hp_mult12_0:3;
};
uint32_t val;
} i2s_rx_pdm2pcm_conf_reg_t;
/** Type of rx_tdm_ctrl register
* I2S TX TDM mode control register
*/
@@ -1038,7 +1001,7 @@ typedef struct {
volatile i2s_rx_recomb_dma_chn_reg_t rx_recomb_dma_ch[4];
volatile i2s_tx_pcm2pdm_conf_reg_t tx_pcm2pdm_conf;
volatile i2s_tx_pcm2pdm_conf1_reg_t tx_pcm2pdm_conf1;
volatile i2s_rx_pdm2pcm_conf_reg_t rx_pdm2pcm_conf;
uint32_t reserved_048;
volatile i2s_rx_tdm_ctrl_reg_t rx_tdm_ctrl;
volatile i2s_tx_tdm_ctrl_reg_t tx_tdm_ctrl;
volatile i2s_rx_timing_reg_t rx_timing;
components/soc/esp32c61/register/soc/i2s_reg.h
+1 -35
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -661,40 +661,6 @@ extern "C" {
#define I2S_TX_IIR_HP_MULT12_0_V 0x00000007U
#define I2S_TX_IIR_HP_MULT12_0_S 23
/** I2S_RX_PDM2PCM_CONF_REG register
* I2S RX configure register
*/
#define I2S_RX_PDM2PCM_CONF_REG (DR_REG_I2S_BASE + 0x48)
/** I2S_RX_PDM2PCM_EN : R/W; bitpos: [19]; default: 0;
* 1: Enable PDM2PCM RX mode. 0: DIsable.
*/
#define I2S_RX_PDM2PCM_EN (BIT(19))
#define I2S_RX_PDM2PCM_EN_M (I2S_RX_PDM2PCM_EN_V << I2S_RX_PDM2PCM_EN_S)
#define I2S_RX_PDM2PCM_EN_V 0x00000001U
#define I2S_RX_PDM2PCM_EN_S 19
/** I2S_RX_PDM_SINC_DSR_16_EN : R/W; bitpos: [20]; default: 0;
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
* sampling rate is 128. 0: down sampling rate is 64.
*/
#define I2S_RX_PDM_SINC_DSR_16_EN (BIT(20))
#define I2S_RX_PDM_SINC_DSR_16_EN_M (I2S_RX_PDM_SINC_DSR_16_EN_V << I2S_RX_PDM_SINC_DSR_16_EN_S)
#define I2S_RX_PDM_SINC_DSR_16_EN_V 0x00000001U
#define I2S_RX_PDM_SINC_DSR_16_EN_S 20
/** I2S_RX_PDM2PCM_AMPLIFY_NUM : R/W; bitpos: [24:21]; default: 1;
* Configure PDM RX amplify number.
*/
#define I2S_RX_PDM2PCM_AMPLIFY_NUM 0x0000000FU
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_M (I2S_RX_PDM2PCM_AMPLIFY_NUM_V << I2S_RX_PDM2PCM_AMPLIFY_NUM_S)
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_V 0x0000000FU
#define I2S_RX_PDM2PCM_AMPLIFY_NUM_S 21
/** I2S_RX_PDM_HP_BYPASS : R/W; bitpos: [25]; default: 0;
* I2S PDM RX bypass hp filter or not.
*/
#define I2S_RX_PDM_HP_BYPASS (BIT(25))
#define I2S_RX_PDM_HP_BYPASS_M (I2S_RX_PDM_HP_BYPASS_V << I2S_RX_PDM_HP_BYPASS_S)
#define I2S_RX_PDM_HP_BYPASS_V 0x00000001U
#define I2S_RX_PDM_HP_BYPASS_S 25
/** I2S_RX_TDM_CTRL_REG register
* I2S TX TDM mode control register
*/
components/soc/esp32c61/register/soc/i2s_struct.h
+2 -31
View File
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -240,34 +240,6 @@ typedef union {
uint32_t val;
} i2s_rx_conf1_reg_t;
/** Type of rx_pdm2pcm_conf register
* I2S RX configure register
*/
typedef union {
struct {
uint32_t reserved_0:19;
/** rx_pdm2pcm_en : R/W; bitpos: [19]; default: 0;
* 1: Enable PDM2PCM RX mode. 0: DIsable.
*/
uint32_t rx_pdm2pcm_en:1;
/** rx_pdm_sinc_dsr_16_en : R/W; bitpos: [20]; default: 0;
* Configure the down sampling rate of PDM RX filter group1 module. 1: The down
* sampling rate is 128. 0: down sampling rate is 64.
*/
uint32_t rx_pdm_sinc_dsr_16_en:1;
/** rx_pdm2pcm_amplify_num : R/W; bitpos: [24:21]; default: 1;
* Configure PDM RX amplify number.
*/
uint32_t rx_pdm2pcm_amplify_num:4;
/** rx_pdm_hp_bypass : R/W; bitpos: [25]; default: 0;
* I2S PDM RX bypass hp filter or not.
*/
uint32_t rx_pdm_hp_bypass:1;
uint32_t reserved_26:6;
};
uint32_t val;
} i2s_rx_pdm2pcm_conf_reg_t;
/** Type of rx_tdm_ctrl register
* I2S TX TDM mode control register
*/
@@ -973,8 +945,7 @@ typedef struct {
uint32_t reserved_030[4];
volatile i2s_tx_pcm2pdm_conf_reg_t tx_pcm2pdm_conf;
volatile i2s_tx_pcm2pdm_conf1_reg_t tx_pcm2pdm_conf1;
volatile i2s_rx_pdm2pcm_conf_reg_t rx_pdm2pcm_conf;
uint32_t reserved_04c;
uint32_t reserved_048[2];
volatile i2s_rx_tdm_ctrl_reg_t rx_tdm_ctrl;
volatile i2s_tx_tdm_ctrl_reg_t tx_tdm_ctrl;
volatile i2s_rx_timing_reg_t rx_timing;