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Merge branch 'fix/esp32p4_secure_boot_sig_block_v6.1' into 'release/v6.1'
fix(esp32p4): secure boot (ECDSA-P384) and flash encryption eFuse fixes (v6.1) See merge request espressif/esp-idf!50898
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -16,6 +16,7 @@
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#include "hal/key_mgr_hal.h"
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#include "hal/key_mgr_ll.h"
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#include "hal/mspi_ll.h"
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#include "hal/spi_flash_encrypted_ll.h"
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ESP_LOG_ATTR_TAG(TAG, "flash_encrypt");
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@@ -45,6 +46,14 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
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#if CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC
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if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
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ESP_LOGI(TAG, "Enable XTS-AES pseudo rounds function...");
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uint8_t xts_pseudo_level = CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH;
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esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
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}
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#endif
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#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
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// This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
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// otherwise the Flash Encryption key cannot be read protected
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -48,6 +48,10 @@ esp_err_t esp_secure_boot_enable_secure_features(void)
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esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE);
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#endif
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#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
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esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_SHA384_EN);
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#endif
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esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
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#ifndef CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
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