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feat(driver_spi): master driver support DDR(DTR) clock mode
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@@ -53,6 +53,7 @@ typedef struct {
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* Left 0 if not known.
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*/
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bool use_gpio; ///< True if the GPIO matrix is used, otherwise false
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bool use_ddr_clk; ///< Whether to use DDR mode for clock
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} spi_hal_timing_param_t;
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/**
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@@ -70,6 +71,7 @@ typedef struct {
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int timing_dummy; ///< Extra dummy needed to compensate the timing
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int timing_miso_delay; ///< Extra miso delay clocks to compensate the timing
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spi_sampling_point_t rx_sample_point;///< Sample data follow standard SPI timing in master mode
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bool use_ddr_clk; ///< Whether to use DDR mode for clock
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} spi_hal_timing_conf_t;
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/**
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