feat(soc): ESP32-H4: enable SOC_ASYNCHRONOUS_BUS_ERROR_MODE

This commit is contained in:
Alexey Lapshin
2026-04-23 20:30:15 +07:00
parent 6ab8c642f5
commit a8b48b3b04
2 changed files with 6 additions and 1 deletions
@@ -1171,6 +1171,10 @@ config SOC_RCC_IS_INDEPENDENT
bool
default y
config SOC_ASYNCHRONOUS_BUS_ERROR_MODE
bool
default y
config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
bool
default y
@@ -508,7 +508,8 @@
#define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 (1) /*!< Support XTAL_D2 clock as the LP_FAST clock source */
#define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */
/*-------------------------- Memory CAPS --------------------------*/
#define SOC_ASYNCHRONOUS_BUS_ERROR_MODE (1)
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1)
#define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1)