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Merge branch 'fix/lp_core_rc_fast_delay_freq_v6.1' into 'release/v6.1'

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fix(ulp): hardcode LP core RC_FAST frequency per target (v6.1)

See merge request espressif/esp-idf!52670
This commit is contained in:
Jiang Jiang Jian
2026-09-15 13:59:06 +08:00
parent fd89f260a2 965530967a
commit a86a78bb6a
1 changed files with 28 additions and 6 deletions
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components/ulp/lp_core/shared/include/ulp_lp_core_cpu_freq_shared.h
+28 -6
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@@ -6,13 +6,35 @@
#pragma once #pragma once
#include "sdkconfig.h" #include "sdkconfig.h"
#include "soc/clk_tree_defs.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
/* LP_FAST_CLK is not very accurate, for now use a rough estimate */ /*
* SOC_CLK_RC_FAST_FREQ_APPROX is a nominal value and can be off by ~10% from the
* clock the LP core actually runs at, e.g. 17.5 MHz nominal vs 16.0 MHz measured
* on ESP32-C6. Hardcode a per-target estimate obtained from the "Test LP core
* delay" test case instead. Values must be a multiple of 500 kHz, otherwise
* LP_CORE_CYCLES_PER_US_NUM below silently rounds them down.
*/
#if CONFIG_IDF_TARGET_ESP32C5
#define LP_CORE_RC_FAST_FREQUENCY_HZ 16500000U
#elif CONFIG_IDF_TARGET_ESP32C6
#define LP_CORE_RC_FAST_FREQUENCY_HZ 16000000U
#elif CONFIG_IDF_TARGET_ESP32P4
#define LP_CORE_RC_FAST_FREQUENCY_HZ 16500000U
#elif CONFIG_IDF_TARGET_ESP32S31
#define LP_CORE_RC_FAST_FREQUENCY_HZ 17500000U
#else
#error "LP core RC_FAST frequency has not been measured for this target"
#endif
#if (LP_CORE_RC_FAST_FREQUENCY_HZ % 500000U) != 0U
#error "LP_CORE_RC_FAST_FREQUENCY_HZ must be a multiple of 500 kHz"
#endif
/* LP_FAST_CLK is not very accurate, for now use a target-specific rough estimate */
#if CONFIG_RTC_FAST_CLK_SRC_RC_FAST #if CONFIG_RTC_FAST_CLK_SRC_RC_FAST
#define LP_CORE_CPU_FREQUENCY_HZ SOC_CLK_RC_FAST_FREQ_APPROX #define LP_CORE_CPU_FREQUENCY_HZ LP_CORE_RC_FAST_FREQUENCY_HZ
#define LP_CORE_CYCLES_PER_US_NUM (SOC_CLK_RC_FAST_FREQ_APPROX / 500000U) #define LP_CORE_CYCLES_PER_US_NUM (LP_CORE_RC_FAST_FREQUENCY_HZ / 500000U)
#define LP_CORE_CYCLES_PER_US_DENOM 2U #define LP_CORE_CYCLES_PER_US_DENOM 2U
#elif CONFIG_RTC_FAST_CLK_SRC_XTAL #elif CONFIG_RTC_FAST_CLK_SRC_XTAL
#if SOC_XTAL_SUPPORT_48M #if SOC_XTAL_SUPPORT_48M
@@ -25,8 +47,8 @@
#define LP_CORE_CYCLES_PER_US_DENOM 1U #define LP_CORE_CYCLES_PER_US_DENOM 1U
#endif #endif
#else // Default value in chip without rtc fast clock sel option #else // Default value in chip without rtc fast clock sel option
#define LP_CORE_CPU_FREQUENCY_HZ SOC_CLK_RC_FAST_FREQ_APPROX #define LP_CORE_CPU_FREQUENCY_HZ LP_CORE_RC_FAST_FREQUENCY_HZ
#define LP_CORE_CYCLES_PER_US_NUM (SOC_CLK_RC_FAST_FREQ_APPROX / 500000U) #define LP_CORE_CYCLES_PER_US_NUM (LP_CORE_RC_FAST_FREQUENCY_HZ / 500000U)
#define LP_CORE_CYCLES_PER_US_DENOM 2U #define LP_CORE_CYCLES_PER_US_DENOM 2U
#endif #endif