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fix(spi_flash): integrate branch prediction control during cache operations

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wuzhenghui
2026-08-31 10:51:05 +08:00
committed by Armando (Dou Yiwen)
parent 8201d8c607
commit a76e14afe7
5 changed files with 70 additions and 26 deletions
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components/esp_hw_support/mspi_timing_tuning.c
+21 -4
View File
@@ -16,6 +16,7 @@
#include "hal/spi_flash_hal.h"
#include "esp_private/esp_cache_private.h"
#include "esp_private/cache_utils.h"
#include "esp_cpu.h"
#include "esp_private/mspi_timing_tuning.h"
#include "esp_private/mspi_timing_config.h"
#include "mspi_timing_by_mspi_delay.h"
@@ -589,20 +590,36 @@ void mspi_timing_change_speed_mode_cache_safe(bool switch_down)
/*------------------------------------------------------------------------------
* Early-init MSPI speed switch (see mspi_timing_tuning.h)
*----------------------------------------------------------------------------*/
static void disable_cache(uint32_t cpuid, uint32_t *saved_state)
{
#if SOC_BRANCH_PREDICTOR_SUPPORTED
esp_cpu_branch_prediction_disable();
#endif
spi_flash_disable_cache(cpuid, saved_state);
}
static void restore_cache(uint32_t cpuid, uint32_t saved_state)
{
spi_flash_restore_cache(cpuid, saved_state);
#if SOC_BRANCH_PREDICTOR_SUPPORTED
esp_cpu_branch_prediction_enable();
#endif
}
void mspi_timing_enter_low_speed_early(void)
{
uint32_t cache_state = 0;
spi_flash_disable_cache(0, &cache_state);
disable_cache(0, &cache_state);
mspi_timing_enter_low_speed_mode(true);
spi_flash_restore_cache(0, cache_state);
restore_cache(0, cache_state);
}
void mspi_timing_enter_high_speed_early(void)
{
uint32_t cache_state = 0;
spi_flash_disable_cache(0, &cache_state);
disable_cache(0, &cache_state);
mspi_timing_enter_high_speed_mode(true);
spi_flash_restore_cache(0, cache_state);
restore_cache(0, cache_state);
}
/*------------------------------------------------------------------------------
components/esp_hw_support/sleep_modes.c
+7
View File
@@ -11,6 +11,7 @@
#include <inttypes.h>
#include "esp_attr.h"
#include "esp_cpu.h"
#include "esp_rom_caps.h"
#include "esp_macros.h"
#include "esp_memory_utils.h"
@@ -510,6 +511,9 @@ static uint32_t s_cache_state = 0;
static void IRAM_ATTR suspend_cache(void) {
s_cache_suspend_cnt++;
if (s_cache_suspend_cnt == 1) {
#if SOC_BRANCH_PREDICTOR_SUPPORTED
esp_cpu_branch_prediction_disable();
#endif
spi_flash_disable_cache(esp_cpu_get_core_id(), &s_cache_state);
}
}
@@ -520,6 +524,9 @@ static void IRAM_ATTR resume_cache(void) {
assert(s_cache_suspend_cnt >= 0 && DRAM_STR("cache resume doesn't match suspend ops"));
if (s_cache_suspend_cnt == 0) {
spi_flash_restore_cache(esp_cpu_get_core_id(), s_cache_state);
#if SOC_BRANCH_PREDICTOR_SUPPORTED
esp_cpu_branch_prediction_enable();
#endif
}
}