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Merge branch 'fix/core_system_fixes_for_p4_eco5_v5_5' into 'release/v5.5'

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Core System fixes for p4 eco5 (v5.5)

See merge request espressif/esp-idf!43726
This commit is contained in:
Jiang Jiang Jian
2025-12-02 19:56:22 +08:00
parent 07d815b447 6f26758e1d
commit a5cc517d31
38 changed files with 130 additions and 218 deletions
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components/hal/esp32p4/include/hal/cpu_utility_ll.h
+4 -2
View File
@@ -33,11 +33,13 @@ FORCE_INLINE_ATTR void cpu_utility_ll_stall_cpu(uint32_t cpu_no)
{
if (cpu_no == 0) {
HAL_FORCE_MODIFY_U32_REG_FIELD(PMU.cpu_sw_stall, hpcore0_stall_code, 0x86);
while(!REG_GET_BIT(HP_SYSTEM_CPU_CORESTALLED_ST_REG, HP_SYSTEM_REG_CORE0_CORESTALLED_ST));
} else {
HAL_FORCE_MODIFY_U32_REG_FIELD(PMU.cpu_sw_stall, hpcore1_stall_code, 0x86);
while(!REG_GET_BIT(HP_SYSTEM_CPU_CORESTALLED_ST_REG, HP_SYSTEM_REG_CORE1_CORESTALLED_ST));
}
// We do not check stalled status here because
// it will not be set if the stalled core was in WFI when the stall happens, thus any check
// is unreliable.
// TODO: when ECO6 fixes this we can add back a check here
}
FORCE_INLINE_ATTR void cpu_utility_ll_unstall_cpu(uint32_t cpu_no)
components/hal/esp32p4/include/hal/efuse_ll.h
+20
View File
@@ -13,6 +13,7 @@
#include "rom/efuse.h"
#include "hal/ecdsa_types.h"
#include "hal/ecdsa_ll.h"
#include "hal/config.h"
#ifdef __cplusplus
extern "C" {
@@ -27,6 +28,25 @@ typedef enum {
EFUSE_CONTROLLER_STATE_READ_RS_BLK = 5, ///< efuse_controllerid is on reading RS block state.
} efuse_controller_state_t;
/* Revision-aware eFuse feature macros
*
* These macros indicate whether an eFuse feature is available given the
* configured minimum supported chip revision (HAL_CONFIG(CHIP_SUPPORT_MIN_REV)).
* Use them when a feature's presence depends on the chosen minimum revision.
*
* Note: SOC_* capability macros describe silicon capabilities; these
* EFUSE_LL_HAS_* macros reflect availability relative to the configured min revision.
* If a feature is present in silicon and does not depend on the chip revision,
* then add SOC_* macro in soc_caps.h instead.
*/
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
// Rev 3.00+: key_purpose fields expanded from 4 to 5 bits, enabling additional key types.
#define EFUSE_LL_HAS_ECDSA_KEY_P192 (1)
#define EFUSE_LL_HAS_ECDSA_KEY_P384 (1)
#define EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_128 (1)
#define EFUSE_LL_HAS_PSRAM_ENCRYPTION_XTS_AES_256 (1)
#endif
// Always inline these functions even no gcc optimization is applied.
/******************* eFuse fields *************************/