feat(spi_flash): Adjust flash clock to real 80M clock, and support 32bit address on eco1

This commit is contained in:
C.S.M
2024-05-27 12:03:49 +08:00
committed by BOT
parent 660de3d5af
commit a4fbcae397
18 changed files with 242 additions and 29 deletions

View File

@@ -127,9 +127,15 @@ menu "Bootloader config"
help
This is a helper config for 32bits address flash. Invisible for users.
config BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH
bool
default y if BOOTLOADER_FLASH_NEEDS_32BIT_FEAT && SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP
help
This is a helper config for 32bits address quad flash. Invisible for users.
config BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH
bool "Enable cache access to 32-bit-address (over 16MB) range of SPI Flash (READ DOCS FIRST)"
depends on BOOTLOADER_FLASH_NEEDS_32BIT_FEAT && IDF_TARGET_ESP32S3 && IDF_EXPERIMENTAL_FEATURES
depends on BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH && IDF_EXPERIMENTAL_FEATURES
default n
help
Enabling this option allows the CPU to access 32-bit-address flash beyond 16M range.