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esp_clk_tree: Rename clk_tree_xxx to esp_clk_tree_xxx, add compilation warning to clk_tree.h

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This commit is contained in:
Song Ruo Jing
2023-04-25 14:12:06 +08:00
parent 269ff98449
commit a4e8960ab4
40 changed files with 215 additions and 215 deletions
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components/driver/test_apps/legacy_timer_driver/main/test_legacy_timer.c
+18 -18
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@@ -11,7 +11,7 @@
#include "unity.h"
#include "driver/timer.h"
#include "esp_private/esp_clk.h"
#include "clk_tree.h"
#include "esp_clk_tree.h"
#include "soc/soc_caps.h"
#include "esp_rom_sys.h"
#include "soc/soc.h"
@@ -288,7 +288,7 @@ static void timer_intr_enable_disable_test(timer_group_t group_num, timer_idx_t
TEST_CASE("Timer_init", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
// Test init 1:config parameter
// empty parameter
timer_config_t config0 = { };
@@ -359,7 +359,7 @@ TEST_CASE("Timer_init", "[hw_timer]")
TEST_CASE("Timer_read_counter_value", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -401,7 +401,7 @@ TEST_CASE("Timer_read_counter_value", "[hw_timer]")
TEST_CASE("Timer_start", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -435,7 +435,7 @@ TEST_CASE("Timer_start", "[hw_timer]")
TEST_CASE("Timer_pause", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -465,7 +465,7 @@ TEST_CASE("Timer_pause", "[hw_timer]")
TEST_CASE("Timer_counter_direction", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -504,7 +504,7 @@ TEST_CASE("Timer_counter_direction", "[hw_timer]")
TEST_CASE("Timer_divider", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -582,7 +582,7 @@ TEST_CASE("Timer_divider", "[hw_timer]")
TEST_CASE("Timer_enable_alarm", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config_test = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -636,7 +636,7 @@ TEST_CASE("Timer_enable_alarm", "[hw_timer]")
TEST_CASE("Timer_set_alarm_value", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
uint64_t alarm_val[SOC_TIMER_GROUP_TOTAL_TIMERS];
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
@@ -676,7 +676,7 @@ TEST_CASE("Timer_set_alarm_value", "[hw_timer]")
TEST_CASE("Timer_auto_reload", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -718,7 +718,7 @@ TEST_CASE("Timer_auto_reload", "[hw_timer]")
TEST_CASE("Timer_enable_timer_interrupt", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -760,7 +760,7 @@ TEST_CASE("Timer_enable_timer_interrupt", "[hw_timer]")
TEST_CASE("Timer_enable_timer_group_interrupt", "[hw_timer][ignore]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
intr_handle_t isr_handle = NULL;
alarm_flag = false;
timer_config_t config = {
@@ -803,7 +803,7 @@ TEST_CASE("Timer_enable_timer_group_interrupt", "[hw_timer][ignore]")
TEST_CASE("Timer_interrupt_register", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -855,7 +855,7 @@ TEST_CASE("Timer_interrupt_register", "[hw_timer]")
TEST_CASE("Timer_xtal_clock_source", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_XTAL, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_XTAL, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
// configure clock source: XTAL
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_XTAL,
@@ -888,7 +888,7 @@ TEST_CASE("Timer_xtal_clock_source", "[hw_timer]")
TEST_CASE("Timer_ISR_callback", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
alarm_flag = false;
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
@@ -951,7 +951,7 @@ TEST_CASE("Timer_ISR_callback", "[hw_timer]")
TEST_CASE("Timer_init_deinit_stress_test", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
timer_config_t config = {
.clk_src = TIMER_SRC_CLK_DEFAULT,
.divider = clk_src_hz / TEST_TIMER_RESOLUTION_HZ,
@@ -974,7 +974,7 @@ TEST_CASE("Timer_init_deinit_stress_test", "[hw_timer]")
static void timer_group_test_init(void)
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
static const uint32_t time_ms = 100; // Alarm value 100ms.
static const uint32_t ste_val = time_ms * TEST_TIMER_RESOLUTION_HZ / 1000;
timer_config_t config = {
@@ -999,7 +999,7 @@ static void timer_group_test_init(void)
TEST_CASE("Timer_check_reinitialization_sequence", "[hw_timer]")
{
uint32_t clk_src_hz = 0;
TEST_ESP_OK(clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)TIMER_SRC_CLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
// 1. step - install driver
timer_group_test_init();
// 2 - register interrupt and start timer