diff --git a/components/esp_libc/test_apps/newlib/pytest_newlib.py b/components/esp_libc/test_apps/newlib/pytest_newlib.py
index 59a6f65fcea..d6fb6a2d18f 100644
--- a/components/esp_libc/test_apps/newlib/pytest_newlib.py
+++ b/components/esp_libc/test_apps/newlib/pytest_newlib.py
@@ -17,6 +17,7 @@ from pytest_embedded_idf.utils import idf_parametrize
         ('release_esp32', 'esp32'),
         ('release_esp32c2', 'esp32c2'),
         ('misaligned_mem', 'esp32c3'),
+        ('zcmp', 'esp32c5'),
     ],
     indirect=['config', 'target'],
 )
diff --git a/components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp b/components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp
new file mode 100644
index 00000000000..7d659180e76
--- /dev/null
+++ b/components/esp_libc/test_apps/newlib/sdkconfig.ci.zcmp
@@ -0,0 +1 @@
+CONFIG_COMPILER_ENABLE_RISCV_ZCMP=y
diff --git a/components/freertos/FreeRTOS-Kernel-SMP/portable/riscv/port.c b/components/freertos/FreeRTOS-Kernel-SMP/portable/riscv/port.c
index 621b226cdee..e77a989c3d9 100644
--- a/components/freertos/FreeRTOS-Kernel-SMP/portable/riscv/port.c
+++ b/components/freertos/FreeRTOS-Kernel-SMP/portable/riscv/port.c
@@ -300,8 +300,8 @@ BaseType_t xPortStartScheduler(void)
     /* Setup the hardware to generate the tick. */
     vPortSetupTimer();
 
-    esprv_int_set_threshold(RVHAL_INTR_ENABLE_THRESH); /* set global interrupt masking level */
     rv_utils_intr_global_enable();
+    esprv_int_set_threshold(RVHAL_INTR_ENABLE_THRESH); /* set global interrupt masking level */
 
     vPortYield();
 
diff --git a/components/freertos/FreeRTOS-Kernel/portable/riscv/port.c b/components/freertos/FreeRTOS-Kernel/portable/riscv/port.c
index e6edd6a185f..61c02998fb7 100644
--- a/components/freertos/FreeRTOS-Kernel/portable/riscv/port.c
+++ b/components/freertos/FreeRTOS-Kernel/portable/riscv/port.c
@@ -170,8 +170,8 @@ BaseType_t xPortStartScheduler(void)
     /* Setup the hardware to generate the tick. */
     vPortSetupTimer();
 
-    esprv_int_set_threshold(RVHAL_INTR_ENABLE_THRESH); /* set global interrupt masking level */
     rv_utils_intr_global_enable();
+    esprv_int_set_threshold(RVHAL_INTR_ENABLE_THRESH); /* set global interrupt masking level */
 
     vPortYield();
 
diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
index 057ec4326b7..2f353c9889a 100644
--- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
@@ -503,6 +503,10 @@ config SOC_CPU_HAS_LOCKUP_RESET
     bool
     default y
 
+config SOC_CPU_HAS_ZC_EXTENSIONS
+    bool
+    default y
+
 config SOC_CPU_ZCMP_WORKAROUND
     bool
     default y
diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h
index 45c721c44e1..7c1d6d88279 100644
--- a/components/soc/esp32c5/include/soc/soc_caps.h
+++ b/components/soc/esp32c5/include/soc/soc_caps.h
@@ -187,6 +187,8 @@
 
 #define SOC_CPU_HAS_LOCKUP_RESET        1
 
+#define SOC_CPU_HAS_ZC_EXTENSIONS       1
+
 #define SOC_CPU_ZCMP_WORKAROUND         1
 #define SOC_CPU_ZCMP_PUSH_REVERSED      1
 #define SOC_CPU_ZCMP_POPRET_ISSUE       1
diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
index 24d2ff9b3f3..17b228461af 100644
--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@@ -387,6 +387,10 @@ config SOC_CPU_HAS_LOCKUP_RESET
     bool
     default y
 
+config SOC_CPU_HAS_ZC_EXTENSIONS
+    bool
+    default y
+
 config SOC_CPU_ZCMP_WORKAROUND
     bool
     default y
diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h
index 3ca95cd1b3c..4887308a787 100644
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@@ -150,6 +150,8 @@
 
 #define SOC_CPU_HAS_LOCKUP_RESET        1
 
+#define SOC_CPU_HAS_ZC_EXTENSIONS       1
+
 #define SOC_CPU_ZCMP_WORKAROUND         1
 #define SOC_CPU_ZCMP_PUSH_REVERSED      1
 #define SOC_CPU_ZCMP_POPRET_ISSUE       1