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refactor(i2c): Add reset and clock control to i2c ll layer
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -56,9 +56,13 @@ static esp_err_t s_i2c_bus_handle_aquire(i2c_port_num_t port_num, i2c_bus_handle
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bus->bus_mode = mode;
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// Enable the I2C module
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periph_module_enable(i2c_periph_signal[port_num].module);
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periph_module_reset(i2c_periph_signal[port_num].module);
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i2c_hal_init(&bus->hal, port_num);
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I2C_RCC_ATOMIC() {
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i2c_ll_enable_bus_clock(bus->port_num, true);
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i2c_ll_reset_register(bus->port_num);
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}
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I2C_CLOCK_SRC_ATOMIC() {
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i2c_hal_init(&bus->hal, port_num);
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}
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}
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} else {
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ESP_LOGE(TAG, "I2C bus id(%d) has already been acquired", port_num);
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@@ -131,7 +135,9 @@ esp_err_t i2c_release_bus_handle(i2c_bus_handle_t i2c_bus)
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ESP_RETURN_ON_ERROR(esp_pm_lock_delete(i2c_bus->pm_lock), TAG, "delete pm_lock failed");
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}
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// Disable I2C module
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periph_module_disable(i2c_periph_signal[port_num].module);
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I2C_RCC_ATOMIC() {
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i2c_ll_enable_bus_clock(port_num, false);
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}
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free(i2c_bus);
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}
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}
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