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feat(lcd): support rgb and i80 lcd on s31

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This commit is contained in:
Chen Jichang
2026-04-21 14:18:31 +08:00
parent d22e05fbc2
commit a3f14c8ed1
36 changed files with 1607 additions and 113 deletions
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components/esp_hal_lcd/esp32s3/include/hal/lcd_ll.h
+65 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -16,6 +16,7 @@
#include "soc/system_struct.h"
#define LCD_LL_GET(_attr) LCD_LL_ ## _attr
#define LCD_LL_SUPPORT(_feat) LCD_LL_SUPPORT_ ## _feat
#define LCD_LL_RGB_BUS_WIDTH 16
#define LCD_LL_RGB_PANEL_NUM 1
#define LCD_LL_I80_BUS_WIDTH 16
@@ -39,6 +40,10 @@ extern "C" {
#define LCD_LL_PCLK_DIV_MAX 64 // LCD_PCLK = LCD_CLK / MO, the MO register is 6 bit-width
#define LCD_LL_FIFO_DEPTH 16 // Async FIFO depth
typedef enum {
LCD_LL_MEM_LP_MODE_SHUT_DOWN,
} lcd_ll_mem_lp_mode_t;
/**
* @brief LCD data byte swizzle mode
*/
@@ -143,6 +148,65 @@ static inline void lcd_ll_set_group_clock_coeff(lcd_cam_dev_t *dev, int div_num,
dev->lcd_clock.lcd_clkm_div_b = div_b;
}
/**
* @brief Force power on the LCD memory block, regardless of the outside PMU logic
*
* @param dev Peripheral instance address
*/
static inline void lcd_ll_mem_force_power_on(lcd_cam_dev_t *dev)
{
(void)dev;
// S3 does not have transfer buffer
}
/**
* @brief Force the LCD memory block into low power mode, regardless of the outside PMU logic
*
* @param dev Peripheral instance address
*/
static inline void lcd_ll_mem_force_low_power(lcd_cam_dev_t *dev)
{
(void)dev;
// S3 does not have transfer buffer
}
/**
* @brief Power control the LCD memory block by the outside PMU logic
*
* @param dev Peripheral instance address
* @param mode LCD memory low power mode in low power stage
*/
static inline void lcd_ll_mem_power_by_pmu(lcd_cam_dev_t *dev)
{
(void)dev;
// S3 does not have transfer buffer
}
/**
* @brief Set low power mode for LCD memory block
*
* @param dev Peripheral instance address
* @param mode LCD memory low power mode in low power stage
*/
static inline void lcd_ll_mem_set_low_power_mode(lcd_cam_dev_t *dev, lcd_ll_mem_lp_mode_t mode)
{
(void)dev;
HAL_ASSERT(mode == LCD_LL_MEM_LP_MODE_SHUT_DOWN);
}
/**
* @brief Enable the transfer buffer(memory block) for LCD module
*
* @param dev Peripheral instance address
* @param en True to enable, False to disable
*/
static inline void lcd_ll_enable_trans_buffer(lcd_cam_dev_t *dev, bool en)
{
(void)dev;
(void)en;
// S3 does not have transfer buffer
}
/**
* @brief Set the PCLK clock level state when there's no transaction undergoing
*