Merge branch 'feature/support_7.6.1_pvt_auto_dbias_v5.5' into 'release/v5.5'

feat(esp32c6): auto adjust LDO voltage using pvt function (v5.5)

See merge request espressif/esp-idf!44102

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -187,6 +187,10 @@ config SOC_PMU_SUPPORTED
     bool
     default y
 
+config SOC_PMU_PVT_SUPPORTED
+    bool
+    default y
+
 config SOC_PAU_SUPPORTED
     bool
     default y

components/soc/esp32c6/include/soc/soc_caps.h

@@ -63,6 +63,7 @@
 #define SOC_BOD_SUPPORTED               1
 #define SOC_APM_SUPPORTED               1 /*!< Support for APM peripheral */
 #define SOC_PMU_SUPPORTED               1
+#define SOC_PMU_PVT_SUPPORTED           1
 #define SOC_PAU_SUPPORTED               1
 #define SOC_LP_TIMER_SUPPORTED          1
 #define SOC_LP_AON_SUPPORTED            1

components/soc/esp32c6/include/soc/system_periph_retention.h

@@ -77,6 +77,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
 #define SYSTIMER_RETENTION_LINK_LEN   19
 extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
 
+/**
+ * @brief Provide access to pvt configuration registers retention
+ * context definition.
+ *
+ * This is an internal function of the sleep retention driver, and is not
+ * useful for external use.
+ */
+#define PVT_RETENTION_LINK_LEN        1
+extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
+
 #ifdef __cplusplus
 }
 #endif