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Merge branch 'refactor/esp_hal_ledc' into 'master'
refactor(ledc): split ledc hal into a separate component Closes IDF-14085 See merge request espressif/esp-idf!44204
This commit is contained in:
Song Ruo Jing
@@ -1,760 +0,0 @@
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/*
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* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for LEDC register operations.
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// Note that most of the register operations in this layer are non-atomic operations.
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#pragma once
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#include "hal/assert.h"
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#include "hal/ledc_types.h"
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#include "soc/ledc_struct.h"
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#include "soc/ledc_reg.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/pcr_struct.h"
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#include "soc/soc_caps.h"
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#include "soc/soc_etm_source.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LEDC_LL_GET_HW() &LEDC
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#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
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#define LEDC_LL_DUTY_NUM_MAX (LEDC_CH0_GAMMA_RANGE0_DUTY_NUM_V)
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#define LEDC_LL_DUTY_CYCLE_MAX (LEDC_CH0_GAMMA_RANGE0_DUTY_CYCLE_V)
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#define LEDC_LL_DUTY_SCALE_MAX (LEDC_CH0_GAMMA_RANGE0_SCALE_V)
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#define LEDC_LL_HPOINT_VAL_MAX (LEDC_HPOINT_CH0_V)
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#define LEDC_LL_OVF_CNT_MAX (LEDC_OVF_NUM_CH0_V + 1)
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#define LEDC_LL_FRACTIONAL_BITS (8)
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#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
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#define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS
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/// Get the mask of the fade end interrupt status register.
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#define LEDC_LL_FADE_END_INTR_MASK (0x3fUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S)
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// Channel tasks: ID, enable register and bit
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#define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \
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((uint32_t [1][LEDC_CHANNEL_ETM_TASK_MAX]){{ \
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[LEDC_CHANNEL_ETM_TASK_FADE_SCALE_UPDATE] = LEDC_TASK_DUTY_SCALE_UPDATE_CH0, \
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[LEDC_CHANNEL_ETM_TASK_SIG_OUT_DIS] = LEDC_TASK_SIG_OUT_DIS_CH0, \
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[LEDC_CHANNEL_ETM_TASK_OVF_CNT_RST] = LEDC_TASK_OVF_CNT_RST_CH0, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESTART] = LEDC_TASK_GAMMA_RESTART_CH0, \
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[LEDC_CHANNEL_ETM_TASK_FADE_PAUSE] = LEDC_TASK_GAMMA_PAUSE_CH0, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESUME] = LEDC_TASK_GAMMA_RESUME_CH0, \
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}}[(group)][(task)] + (channel))
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#define LEDC_LL_ETM_CHANNEL_TASK_EN_REG(group, task) \
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((volatile uint32_t *[1][LEDC_CHANNEL_ETM_TASK_MAX]){{ \
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[LEDC_CHANNEL_ETM_TASK_FADE_SCALE_UPDATE] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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[LEDC_CHANNEL_ETM_TASK_SIG_OUT_DIS] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_CHANNEL_ETM_TASK_OVF_CNT_RST] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESTART] = (volatile uint32_t *)LEDC_EVT_TASK_EN2_REG, \
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[LEDC_CHANNEL_ETM_TASK_FADE_PAUSE] = (volatile uint32_t *)LEDC_EVT_TASK_EN2_REG, \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESUME] = (volatile uint32_t *)LEDC_EVT_TASK_EN2_REG, \
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}}[(group)][(task)])
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#define LEDC_LL_ETM_CHANNEL_TASK_EN_BIT(group, channel, task) \
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((uint32_t [1][LEDC_CHANNEL_ETM_TASK_MAX]){{ \
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[LEDC_CHANNEL_ETM_TASK_FADE_SCALE_UPDATE] = BIT(LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_SIG_OUT_DIS] = BIT(LEDC_TASK_SIG_OUT_DIS_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_OVF_CNT_RST] = BIT(LEDC_TASK_OVF_CNT_RST_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESTART] = BIT(LEDC_TASK_GAMMA_RESTART_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_FADE_PAUSE] = BIT(LEDC_TASK_GAMMA_PAUSE_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_TASK_FADE_RESUME] = BIT(LEDC_TASK_GAMMA_RESUME_CH0_EN_S), \
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}}[(group)][(task)] << (channel))
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// Channel events: ID, enable register and bit
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#define LEDC_LL_ETM_CHANNEL_EVENT_ID(group, channel, event) \
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((uint32_t [1][LEDC_CHANNEL_ETM_EVENT_MAX]){{ \
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[LEDC_CHANNEL_ETM_EVENT_FADE_END] = LEDC_EVT_DUTY_CHNG_END_CH0, \
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[LEDC_CHANNEL_ETM_EVENT_REACH_MAX_OVF_CNT] = LEDC_EVT_OVF_CNT_PLS_CH0, \
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}}[(group)][(event)] + (channel))
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#define LEDC_LL_ETM_CHANNEL_EVENT_EN_REG(group, event) \
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((volatile uint32_t *[1][LEDC_CHANNEL_ETM_EVENT_MAX]){{ \
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[LEDC_CHANNEL_ETM_EVENT_FADE_END] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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[LEDC_CHANNEL_ETM_EVENT_REACH_MAX_OVF_CNT] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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}}[(group)][(event)])
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#define LEDC_LL_ETM_CHANNEL_EVENT_EN_BIT(group, channel, event) \
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((uint32_t [1][LEDC_CHANNEL_ETM_EVENT_MAX]){{ \
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[LEDC_CHANNEL_ETM_EVENT_FADE_END] = BIT(LEDC_EVT_DUTY_CHNG_END_CH0_EN_S), \
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[LEDC_CHANNEL_ETM_EVENT_REACH_MAX_OVF_CNT] = BIT(LEDC_EVT_OVF_CNT_PLS_CH0_EN_S), \
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}}[(group)][(event)] << (channel))
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// Timer tasks: ID, enable register and bit
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#define LEDC_LL_ETM_TIMER_TASK_ID(group, timer, task) \
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((uint32_t [1][LEDC_TIMER_ETM_TASK_MAX]){{ \
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[LEDC_TIMER_ETM_TASK_RST] = LEDC_TASK_TIMER0_RST, \
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[LEDC_TIMER_ETM_TASK_RESUME] = LEDC_TASK_TIMER0_RESUME, \
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[LEDC_TIMER_ETM_TASK_PAUSE] = LEDC_TASK_TIMER0_PAUSE, \
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}}[(group)][(task)] + (timer))
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#define LEDC_LL_ETM_TIMER_TASK_EN_REG(group, task) \
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((volatile uint32_t *[1][LEDC_TIMER_ETM_TASK_MAX]){{ \
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[LEDC_TIMER_ETM_TASK_RST] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_TIMER_ETM_TASK_RESUME] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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[LEDC_TIMER_ETM_TASK_PAUSE] = (volatile uint32_t *)LEDC_EVT_TASK_EN1_REG, \
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}}[(group)][(task)])
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#define LEDC_LL_ETM_TIMER_TASK_EN_BIT(group, timer, task) \
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((uint32_t [1][LEDC_TIMER_ETM_TASK_MAX]){{ \
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[LEDC_TIMER_ETM_TASK_RST] = BIT(LEDC_TASK_TIMER0_RST_EN_S), \
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[LEDC_TIMER_ETM_TASK_RESUME] = BIT(LEDC_TASK_TIMER0_PAUSE_RESUME_EN_S), \
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[LEDC_TIMER_ETM_TASK_PAUSE] = BIT(LEDC_TASK_TIMER0_PAUSE_RESUME_EN_S), \
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}}[(group)][(task)] << (timer))
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// Timer events: ID, enable register and bit
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#define LEDC_LL_ETM_TIMER_EVENT_ID(group, timer, event) \
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((uint32_t [1][LEDC_TIMER_ETM_EVENT_MAX]){{ \
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[LEDC_TIMER_ETM_EVENT_OVF] = LEDC_EVT_TIME_OVF_TIMER0, \
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}}[(group)][(event)] + (timer))
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#define LEDC_LL_ETM_TIMER_EVENT_EN_REG(group, event) \
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((volatile uint32_t *[1][LEDC_TIMER_ETM_EVENT_MAX]){{ \
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[LEDC_TIMER_ETM_EVENT_OVF] = (volatile uint32_t *)LEDC_EVT_TASK_EN0_REG, \
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}}[(group)][(event)])
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#define LEDC_LL_ETM_TIMER_EVENT_EN_BIT(group, timer, event) \
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((uint32_t [1][LEDC_TIMER_ETM_EVENT_MAX]){{ \
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[LEDC_TIMER_ETM_EVENT_OVF] = BIT(LEDC_EVT_TIME_OVF_TIMER0_EN_S), \
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}}[(group)][(event)] << (timer))
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/**
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* @brief Enable peripheral register clock
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*
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* @param enable Enable/Disable
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*/
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static inline void ledc_ll_enable_bus_clock(bool enable)
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{
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PCR.ledc_conf.ledc_clk_en = enable;
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}
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/**
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* @brief Reset whole peripheral register to init value defined by HW design
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*/
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static inline void ledc_ll_enable_reset_reg(bool enable)
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{
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PCR.ledc_conf.ledc_rst_en = enable;
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}
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/**
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* @brief Enable the power for LEDC memory block
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*
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* Note. This function cannot overwrite the power control of the mem block in sleep mode
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*/
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static inline void ledc_ll_enable_mem_power(bool enable)
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{
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PCR.ledc_pd_ctrl.ledc_mem_force_pd = !enable;
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}
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/**
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* @brief Enable LEDC function clock
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*
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* @param hw Beginning address of the peripheral registers
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* @param en True to enable, false to disable
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*
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* @return None
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*/
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static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
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{
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(void)hw;
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PCR.ledc_sclk_conf.ledc_sclk_en = en;
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}
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/**
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* @brief Enable the power for LEDC channel
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
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* @param en True to enable, false to disable
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*/
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static inline void ledc_ll_enable_channel_power(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool en)
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{
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// No per channel power control on C5
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}
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/**
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* @brief Enable the power for LEDC timer
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
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* @param en True to enable, false to disable
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*/
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static inline void ledc_ll_enable_timer_power(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, bool en)
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{
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// No per timer power control on C5
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}
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/**
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* @brief Set LEDC low speed timer clock
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*
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* @param hw Beginning address of the peripheral registers
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* @param slow_clk_sel LEDC low speed timer clock source
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*
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* @return None
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*/
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static inline void ledc_ll_set_slow_clk_sel(ledc_dev_t *hw, ledc_slow_clk_sel_t slow_clk_sel)
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{
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(void) hw;
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uint32_t clk_sel_val = 3;
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switch (slow_clk_sel)
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{
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case LEDC_SLOW_CLK_XTAL:
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clk_sel_val = 0;
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break;
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case LEDC_SLOW_CLK_RC_FAST:
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clk_sel_val = 1;
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break;
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case LEDC_SLOW_CLK_PLL_DIV:
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clk_sel_val = 2;
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break;
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default:
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abort();
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}
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PCR.ledc_sclk_conf.ledc_sclk_sel = clk_sel_val;
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}
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/**
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* @brief Get LEDC low speed timer clock
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*
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* @param hw Beginning address of the peripheral registers
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* @param slow_clk_sel LEDC low speed timer clock source
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*
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* @return None
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*/
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static inline void ledc_ll_get_slow_clk_sel(ledc_dev_t *hw, ledc_slow_clk_sel_t *slow_clk_sel)
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{
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(void) hw;
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switch (PCR.ledc_sclk_conf.ledc_sclk_sel)
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{
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case 0:
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*slow_clk_sel = LEDC_SLOW_CLK_XTAL;
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break;
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case 1:
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*slow_clk_sel = LEDC_SLOW_CLK_RC_FAST;
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break;
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case 2:
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*slow_clk_sel = LEDC_SLOW_CLK_PLL_DIV;
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break;
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default:
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abort();
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}
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}
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/**
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* @brief Update LEDC low speed timer
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
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*
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* @return None
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*/
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static inline void ledc_ll_ls_timer_update(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
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{
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hw->timer_group[speed_mode].timer[timer_sel].conf.para_up = 1;
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// Here, we don't wait for the bit gets cleared since it can take quite long depends on the pwm frequency
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}
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/**
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* @brief Reset LEDC timer
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
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*
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* @return None
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*/
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static inline void ledc_ll_timer_rst(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
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{
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hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1;
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hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0;
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}
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/**
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* @brief Pause LEDC timer
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
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*
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* @return None
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*/
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static inline void ledc_ll_timer_pause(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
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{
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hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1;
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}
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/**
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* @brief Resume LEDC timer
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
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*
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* @return None
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*/
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static inline void ledc_ll_timer_resume(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
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{
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hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0;
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||||
}
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||||
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/**
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||||
* @brief Set LEDC timer clock divider
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
* @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
|
||||
*
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||||
* @return None
|
||||
*/
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static inline void ledc_ll_set_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t clock_divider)
|
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{
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hw->timer_group[speed_mode].timer[timer_sel].conf.clk_div = clock_divider;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LEDC timer clock divider
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
* @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *clock_divider)
|
||||
{
|
||||
*clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clk_div;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LEDC timer clock source
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
* @param clk_src Pointer to accept the timer clock source
|
||||
*
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||||
* @return None
|
||||
*/
|
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static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
|
||||
{
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||||
// The target has no timer-specific clock source option
|
||||
HAL_ASSERT(hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 0);
|
||||
*clk_src = LEDC_SCLK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set LEDC duty resolution
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
* @param duty_resolution Resolution of duty setting in number of bits. The range of duty values is [0, (2**duty_resolution)]
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_duty_resolution(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t duty_resolution)
|
||||
{
|
||||
hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res = duty_resolution;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LEDC duty resolution
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
* @param duty_resolution Pointer to accept the resolution of duty setting in number of bits.
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_duty_resolution(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *duty_resolution)
|
||||
{
|
||||
*duty_resolution = hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LEDC max duty
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
* @param max_duty Pointer to accept the max duty
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_max_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *max_duty)
|
||||
{
|
||||
*max_duty = (1 << (hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update channel configure when select low speed mode
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_ls_channel_update(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].conf0.para_up = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set LEDC hpoint value
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param hpoint_val LEDC hpoint value(max: 0xfffff)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_hpoint(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t hpoint_val)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].hpoint.hpoint = hpoint_val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LEDC hpoint value
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param hpoint_val Pointer to accept the LEDC hpoint value(max: 0xfffff)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_hpoint(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *hpoint_val)
|
||||
{
|
||||
*hpoint_val = hw->channel_group[speed_mode].channel[channel_num].hpoint.hpoint;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set LEDC the integer part of duty value
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param duty_val LEDC duty value, the range of duty setting is [0, (2**duty_resolution)]
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_duty_int_part(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_val)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].duty_init.duty = duty_val << 4;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LEDC duty value
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param duty_val Pointer to accept the LEDC duty value
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *duty_val)
|
||||
{
|
||||
*duty_val = (hw->channel_group[speed_mode].channel[channel_num].duty_r.duty >> 4);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function to set fade parameters all-in-one
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param range Gamma fade range index, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
|
||||
* @param dir LEDC duty change direction, increase or decrease
|
||||
* @param cycle The duty cycles
|
||||
* @param scale The step scale
|
||||
* @param step The number of increased or decreased times
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
|
||||
{
|
||||
HAL_ASSERT(range < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX);
|
||||
ledc_channel_gamma_fade_param_t range_param = {
|
||||
.duty_inc = dir,
|
||||
.duty_cycle = cycle,
|
||||
.scale = scale,
|
||||
.duty_num = step,
|
||||
};
|
||||
LEDC_GAMMA_RAM.channel[channel_num].entry[range].val = range_param.val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the total number of ranges in one fading
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param range_num Total number of ranges (1 - SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX) of the fading configured
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_range_number(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range_num)
|
||||
{
|
||||
hw->channel_gamma_conf_group[speed_mode].gamma_conf[channel_num].gamma_entry_num = range_num;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the total number of ranges in one fading
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param range_num Pointer to accept fade range number
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_range_number(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *range_num)
|
||||
{
|
||||
*range_num = hw->channel_gamma_conf_group[speed_mode].gamma_conf[channel_num].gamma_entry_num;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get fade configurations in gamma_rd register
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param range Gamma fade range index to get, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
|
||||
* @param dir Pointer to accept fade direction value
|
||||
* @param cycle Pointer to accept fade cycle value
|
||||
* @param scale Pointer to accept fade scale value
|
||||
* @param step Pointer to accept fade step value
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
|
||||
{
|
||||
ledc_channel_gamma_fade_param_t range_param = {
|
||||
.val = LEDC_GAMMA_RAM.channel[channel_num].entry[range].val,
|
||||
};
|
||||
|
||||
*dir = range_param.duty_inc;
|
||||
*cycle = range_param.duty_cycle;
|
||||
*scale = range_param.scale;
|
||||
*step = range_param.duty_num;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the output enable
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param sig_out_en The output enable status
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void ledc_ll_set_sig_out_en(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool sig_out_en)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].conf0.sig_out_en = sig_out_en;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the duty start
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_duty_start(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].conf1.duty_start = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set output idle level
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param idle_level The output idle level
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t idle_level)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].conf0.idle_lv = idle_level & 0x1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set fade end interrupt enable
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param fade_end_intr_en The fade end interrupt enable status
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en)
|
||||
{
|
||||
uint32_t value = hw->int_ena.val;
|
||||
uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S;
|
||||
hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num))));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get fade end interrupt status
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param intr_status The fade end interrupt status
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status)
|
||||
{
|
||||
uint32_t value = hw->int_st.val;
|
||||
uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S;
|
||||
*intr_status = (value >> int_en_base) & 0xff;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the address of the fade end interrupt status register.
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @return Pointer to the fade end interrupt status register.
|
||||
*/
|
||||
static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw)
|
||||
{
|
||||
return &hw->int_st.val;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Clear fade end interrupt status
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
|
||||
{
|
||||
uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S;
|
||||
hw->int_clr.val = BIT(int_en_base + channel_num);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set timer index of the specified channel
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_bind_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t timer_sel)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel = timer_sel;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get timer index of the specified channel
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel_num LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param timer_sel Pointer to accept the LEDC timer index
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t *timer_sel)
|
||||
{
|
||||
*timer_sel = (ledc_timer_t)(hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable or disable ETM event/task
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param reg_addr Register address to control the ETM event/task
|
||||
* @param bit Bit position in the register
|
||||
* @param enable Enable or disable the ETM event/task
|
||||
*/
|
||||
static inline void ledc_ll_etm_enable_evt_task(ledc_dev_t *hw, ledc_mode_t speed_mode, volatile uint32_t *reg_addr, uint32_t bit, bool enable)
|
||||
{
|
||||
if (enable) {
|
||||
REG_SET_BIT(reg_addr, bit);
|
||||
} else {
|
||||
REG_CLR_BIT(reg_addr, bit);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable or disable the timer overflow counter for the specified channel
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param enable True to enable; false to disable
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_channel_enable_timer_ovt_cnt(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel, bool enable)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel].conf0.ovf_cnt_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the maximum timer overflow count for the specified channel
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel LEDC channel index (0-5), select from ledc_channel_t
|
||||
* @param max_ovf_cnt The maximum timer overflow count
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_channel_set_maximum_timer_ovf_cnt(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t max_ovf_cnt)
|
||||
{
|
||||
HAL_ASSERT(max_ovf_cnt > 0 && max_ovf_cnt <= LEDC_LL_OVF_CNT_MAX);
|
||||
hw->channel_group[speed_mode].channel[channel].conf0.ovf_num = max_ovf_cnt - 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reset the timer overflow counter for the specified channel
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers
|
||||
* @param speed_mode LEDC speed_mode, low-speed mode only
|
||||
* @param channel LEDC channel index (0-5), select from ledc_channel_t
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
static inline void ledc_ll_channel_reset_timer_ovf_cnt(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel)
|
||||
{
|
||||
hw->channel_group[speed_mode].channel[channel].conf0.ovf_cnt_reset = 1;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user