feat(lcd): support color conversion for mipi dsi driver

components/esp_hw_support/dma/Kconfig.dma

@@ -29,6 +29,7 @@ menu "DW_GDMA Configurations"
     config DW_GDMA_CTRL_FUNC_IN_IRAM
         bool
         default n
+        select DW_GDMA_OBJ_DRAM_SAFE
         help
             Place DW_GDMA control functions (e.g. dw_gdma_channel_continue) into IRAM,
             so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
@@ -36,6 +37,7 @@ menu "DW_GDMA Configurations"
     config DW_GDMA_SETTER_FUNC_IN_IRAM
         bool
         default n
+        select DW_GDMA_OBJ_DRAM_SAFE
         help
             Place DW_GDMA setter functions (e.g. dw_gdma_channel_set_block_markers) into IRAM,
             so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
@@ -43,6 +45,7 @@ menu "DW_GDMA Configurations"
     config DW_GDMA_GETTER_FUNC_IN_IRAM
         bool
         default n
+        select DW_GDMA_OBJ_DRAM_SAFE
         help
             Place DW_GDMA getter functions (e.g. dw_gdma_link_list_get_item) into IRAM,
             so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
@@ -50,11 +53,19 @@ menu "DW_GDMA Configurations"
     config DW_GDMA_ISR_IRAM_SAFE
         bool
         default n
+        select DW_GDMA_OBJ_DRAM_SAFE
         help
             This will ensure the DW_GDMA interrupt handler is IRAM-Safe, allow to avoid flash
             cache misses, and also be able to run whilst the cache is disabled.
             (e.g. SPI Flash write).
 
+    config DW_GDMA_OBJ_DRAM_SAFE
+        bool
+        default n
+        help
+            This will ensure the DW_GDMA object is DRAM-Safe, allow to avoid external memory
+            cache misses, and also be accessible whilst the cache is disabled.
+
     config DW_GDMA_ENABLE_DEBUG_LOG
         bool "Enable debug log"
         default n

components/esp_hw_support/dma/dw_gdma.c

@@ -48,7 +48,7 @@ static const char *TAG = "dw-gdma";
 #define DW_GDMA_GET_CACHE_ADDRESS(nc_addr) (nc_addr)
 #endif
 
-#if CONFIG_DW_GDMA_ISR_IRAM_SAFE || CONFIG_DW_GDMA_CTRL_FUNC_IN_IRAM || DW_GDMA_SETTER_FUNC_IN_IRAM
+#if CONFIG_DW_GDMA_OBJ_DRAM_SAFE
 #define DW_GDMA_MEM_ALLOC_CAPS    (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
 #else
 #define DW_GDMA_MEM_ALLOC_CAPS    MALLOC_CAP_DEFAULT

components/esp_hw_support/dma/gdma_link.c

@@ -13,6 +13,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "soc/soc_caps.h"
+#include "soc/ext_mem_defs.h"
 #include "esp_log.h"
 #include "esp_check.h"
 #include "esp_memory_utils.h"

components/esp_hw_support/test_apps/dma/main/test_dw_gdma.c

@@ -380,6 +380,7 @@ static bool test_dw_gdma_list_mode_invalid_block_cb(dw_gdma_channel_handle_t cha
     udata->count++;
     // clear the destination buffer
     memset(udata->dst_buffer_addr, 0, udata->dst_buffer_size);
+    esp_cache_msync(udata->dst_buffer_addr, udata->dst_buffer_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
     dw_gdma_block_markers_t markers = {
         .is_last = true,  // mark the next block as the last one
         .is_valid = true, // mark the block as valid so that the DMA can continue the transfer