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feat(esp_security): support s31 security clock management
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@@ -0,0 +1,39 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "soc/clk_tree_defs.h"
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#include "soc/pcr_struct.h"
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#include "hal/assert.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Select crypto clock source.
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*
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* @param src Clock source (SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST, or SOC_MOD_CLK_SPLL)
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*/
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static inline __attribute__((always_inline)) void sec_ll_crypto_clk_src_sel(soc_module_clk_t src)
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{
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uint32_t reg_val = 3;
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if (src == SOC_MOD_CLK_XTAL) {
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reg_val = 0;
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} else if (src == SOC_MOD_CLK_RC_FAST) {
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reg_val = 1;
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} else if (src == SOC_MOD_CLK_SPLL) {
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reg_val = 2;
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} else {
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HAL_ASSERT(false);
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}
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PCR.sec_conf.sec_clk_sel = reg_val;
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}
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#ifdef __cplusplus
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}
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#endif
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